Construct an 8-to-1-line multiplexer using seven 2-to-1-line multiplexers. No other gate is allowed to use. Hint: please first draw the truth table of an 8-to- 1-line multiplexer. And then inspect the truth table to find out how to organize the seven 2-to-1-line multiplexers. The eight inputs of the 8-to-1-line multiplexer are 10 17 and the three control signals (also called selecting signals) are S2, S1, and SO. The output is F.

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Construct an 8-to-1-line multiplexer using seven 2-to-1-line multiplexers.
No other gate is allowed to use. Hint: please first draw the truth table of an 8-to-
1-line multiplexer. And then inspect the truth table to find out how to organize the
seven 2-to-1-line multiplexers. The eight inputs of the 8-to-1-line multiplexer are
I0 ~ 17 and the three control signals (also called selecting signals) are S2, S1, and
SO. The output is F.
Out Put
Solutia tme c
to
I,
2:1 max
3
1.
DAt Put F
mux
lic
Solution time
うて
Transcribed Image Text:Construct an 8-to-1-line multiplexer using seven 2-to-1-line multiplexers. No other gate is allowed to use. Hint: please first draw the truth table of an 8-to- 1-line multiplexer. And then inspect the truth table to find out how to organize the seven 2-to-1-line multiplexers. The eight inputs of the 8-to-1-line multiplexer are I0 ~ 17 and the three control signals (also called selecting signals) are S2, S1, and SO. The output is F. Out Put Solutia tme c to I, 2:1 max 3 1. DAt Put F mux lic Solution time うて
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