Consider the following RISC-V code. addi x9, x8, 0 addi x10, x0, 0 addi x11, x0, 0 L: lw x12, 0(x9) add x10,x10,x12 addi x9,x9,4 addi x11,x11,1 addi x13,x0,20 blt x11,x13,L s w x17, 16(x9) Answer the following questions: a) How many instructions will be executed in hardware? b) How many sequential instructions are there? c) How many control (branch) instructions are there? d) What is the total number of cycles needed to execute these instructions and the CPI, if no branch prediction is implemented? e) What is the total number of cycles needed to execute these instructions and the CPI, if I implement a “Always Taken” predictor. f) Repeat Q5 with “Always Not Taken” Predi
Computer Science
Consider the following RISC-V code.
addi x9, x8, 0
addi x10, x0, 0
addi x11, x0, 0
L: lw x12, 0(x9)
add x10,x10,x12
addi x9,x9,4
addi x11,x11,1
addi x13,x0,20
blt x11,x13,L s
w x17, 16(x9)
Answer the following questions: a) How many instructions will be executed in hardware? b) How many sequential instructions are there? c) How many control (branch) instructions are there? d) What is the total number of cycles needed to execute these instructions and the CPI, if no branch prediction is implemented? e) What is the total number of cycles needed to execute these instructions and the CPI, if I implement a “Always Taken” predictor. f) Repeat Q5 with “Always Not Taken” Predictor.
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