Consider the following bias circuit. It has been not only been made DC analysis ready for you but it has also been already decomposed into the input and output loops, for your convenience! Assume a silicon transistor and a beta value of 120. Please follow Honor Da 3 2-2 k 3 2-2k 300 E 12V Honor 12 v $1-2 kr or Policy 1.2 kL Fig i : Input loop Fig ii: Output loop Pol

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Consider the following bias circuit. It has been not only been made DC analysis ready for you but it has also been
already decomposed into the input and output loops, for your convenience! Assume a silicon transistor and a beta
value of 120.
Please follow Honor Da
3 2.2 k
2.2k
300 ks
12V
Honor Polic
12 V
31-2 kr
or Policy
1.2 k2
Fig i : Input loop
Fig ii: Output loop
(a) What bias configuration is this?
(b) Denote all variables, polarities and directions in the input loop and output loop.
(c) Apply KVL in the input loop and derive an equation to find the base current. (There should be no current
term other than base current in the final equation) Note that Ic' = IE. Do NOT assume lc' = Ic. Do NOT
assume lç = Ig. Such assumption will yield a direct zero in this entire segment, aka, part (c). Now, useW H
your equation to find the value for the base current.
(d) KVL has been applied in the output loop and an equation for the collector current has been found for you:
Honor Policy
Vcc - VCE
Ic
(1+5) (Rc + RE)
Imor Policy
Which single variable in the above equation should be set to 0, if we would like to find the collector saturation
current, aka, Icmas? Set it so, and find this maximum collector current value for this circuit.
Polt
Transcribed Image Text:Consider the following bias circuit. It has been not only been made DC analysis ready for you but it has also been already decomposed into the input and output loops, for your convenience! Assume a silicon transistor and a beta value of 120. Please follow Honor Da 3 2.2 k 2.2k 300 ks 12V Honor Polic 12 V 31-2 kr or Policy 1.2 k2 Fig i : Input loop Fig ii: Output loop (a) What bias configuration is this? (b) Denote all variables, polarities and directions in the input loop and output loop. (c) Apply KVL in the input loop and derive an equation to find the base current. (There should be no current term other than base current in the final equation) Note that Ic' = IE. Do NOT assume lc' = Ic. Do NOT assume lç = Ig. Such assumption will yield a direct zero in this entire segment, aka, part (c). Now, useW H your equation to find the value for the base current. (d) KVL has been applied in the output loop and an equation for the collector current has been found for you: Honor Policy Vcc - VCE Ic (1+5) (Rc + RE) Imor Policy Which single variable in the above equation should be set to 0, if we would like to find the collector saturation current, aka, Icmas? Set it so, and find this maximum collector current value for this circuit. Polt
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