Consider a system in which bus cycles takes 500 ns. Transfer of bus control in either direction, from processor to I/O device or vice versa, takes 250 ns. One of the I/O de- vices has a data transfer rate of 50 KB/s and employs DMA. Data are transferred one byte at a time. a. Suppose we employ DMA in a burst mode. That is, the DMA interface gains bus mastership prior to the start of a block transfer and maintains control of the bus until the whole block is transferred. For how long would the device tie up the bus when transferring a block of 128 bytes? b. Repeat the calculation for cycle-stealing mode.
Consider a system in which bus cycles takes 500 ns. Transfer of bus control in either direction, from processor to I/O device or vice versa, takes 250 ns. One of the I/O de- vices has a data transfer rate of 50 KB/s and employs DMA. Data are transferred one byte at a time. a. Suppose we employ DMA in a burst mode. That is, the DMA interface gains bus mastership prior to the start of a block transfer and maintains control of the bus until the whole block is transferred. For how long would the device tie up the bus when transferring a block of 128 bytes? b. Repeat the calculation for cycle-stealing mode.
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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![Consider a system in which bus cycles takes 500 ns. Transfer of bus control in either
direction, from processor to I/O device or vice versa, takes 250 ns. One of the I/O de-
vices has a data transfer rate of 50 KB/s and employs DMA. Data are transferred one
byte at a time.
a. Suppose we employ DMA in a burst mode. That is, the DMA interface gains bus
mastership prior to the start of a block transfer and maintains control of the bus
until the whole block is transferred. For how long would the device tie up the bus
when transferring a block of 128 bytes?
b. Repeat the calculation for cycle-stealing mode.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F8a2cfc21-d637-4567-a9ca-c4adb989731c%2F7dc7ee35-3455-4f60-9bca-16c349fa2054%2Fgcv89s_processed.jpeg&w=3840&q=75)
Transcribed Image Text:Consider a system in which bus cycles takes 500 ns. Transfer of bus control in either
direction, from processor to I/O device or vice versa, takes 250 ns. One of the I/O de-
vices has a data transfer rate of 50 KB/s and employs DMA. Data are transferred one
byte at a time.
a. Suppose we employ DMA in a burst mode. That is, the DMA interface gains bus
mastership prior to the start of a block transfer and maintains control of the bus
until the whole block is transferred. For how long would the device tie up the bus
when transferring a block of 128 bytes?
b. Repeat the calculation for cycle-stealing mode.
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