Q: Choose the correct answer:1. The signal used to insert Tw state:a. RESETb. HLT2. DRAM access time is:a. (500-700) n secb. (0.05-0.07) μ secC. READYd. RDc. (5-7) µ secd. Neither a, b, nor c3. If you have a ROM of size 5060 byte, suitable the number of address line to cover it is:a. 11 address linesb. 12 address linesc. 13 address linesd. 14 address lines4. In isolated input/output port, port 27 (16-bit port) is:a. Port 53 & 54 (8-bit port)b. Port 54 & 55 (8-bit port)5. The ROM type that can erase its data is:a. PROMb. EPROMc. Port 26 & 27 (8-bit port)d. Port 27 & 28 (8-bit port)c. EEPROMd. b & c Q: Choose the correct answer:1. The signal used to insert Tw state i :c. READYd. RDa. RESETb. HLT2. DRAM access time is:a. (500-700) n secb. (0.05-0.07) µ secc. (5-7) µ secd. Neither a, b, nor c3. If you have a ROM of size 5060 byte, suitable the number of address line to cover it is:c. 13 address linesa. 11 address linesb. 12 address linesd. 14 address lines4. In isolated input/output port, port 27 (16-bit port) is:a. Port 53 & 54 (8-bit port)b. Port 54 & 55 (8-bit port)c. Port 26 & 27 (8-bit port)d. Port 27 & 28 (8-bit port)5. The ROM type that can erase its data is:c. EEPROMd. b & ca. PROMb. EPROM

Subject: Digital circuit and fundamentals of microprocessor The process by which the normal working…

Answered: Choose the correct answer: 1. The…

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

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Q: Choose the correct answer: 1. The signal used to insert Tw state: a. RESET b. HLT 2. DRAM access time is: a. (500-700) n sec b. (0.05-0.07) μ sec C. READY d. RD c. (5-7) µ sec d. Neither a, b, nor c 3. If you have a ROM of size 5060 byte, suitable the number of address line to cover it is: a. 11 address lines b. 12 address lines c. 13 address lines d. 14 address lines 4. In isolated input/output port, port 27 (16-bit port) is: a. Port 53 & 54 (8-bit port) b. Port 54 & 55 (8-bit port) 5. The ROM type that can erase its data is: a. PROM b. EPROM c. Port 26 & 27 (8-bit port) d. Port 27 & 28 (8-bit port) c. EEPROM d. b & c

Q: Choose the correct answer:
1. The signal used to insert Tw state i :
c. READY
d. RD
a. RESET
b. HLT
2. DRAM access time is:
a. (500-700) n sec
b. (0.05-0.07) µ sec
c. (5-7) µ sec
d. Neither a, b, nor c
3. If you have a ROM of size 5060 byte, suitable the number of address line to cover it is:
c. 13 address lines
a. 11 address lines
b. 12 address lines
d. 14 address lines
4. In isolated input/output port, port 27 (16-bit port) is:
a. Port 53 & 54 (8-bit port)
b. Port 54 & 55 (8-bit port)
c. Port 26 & 27 (8-bit port)
d. Port 27 & 28 (8-bit port)
5. The ROM type that can erase its data is:
c. EEPROM
d. b & c
a. PROM
b. EPROM

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