Calculate the gate to source voltage VGs for a NMOS transistor with B=2200HA/V, V= LV and operating in saturation with a transconductance g 5 mS.Draw the small signal equivalent circuit model valid in the mid-band frequeneyrange for the circuit shown in Figure 1 and identify the kind of amplifier formedby the NMOS transistor Ml. Clearly state any assumption.Using two transistors nominally identical to MI and the configuration shown inFigure 1, design a còmmon source voltage amplifier with improved gain. Drawthe mid-band frequency range for the resulting circuit in the hypothesis that thevalue R, is very big (open circuit) and state what kind of configuration you used.Explain why the resulting output impedance is bigger when compared to asingle stage common source amplifier.R,RpM1outCsR,RsI'ss =0VFigure IDraw the schematie cireuit for a resistively loaded NMOS inverter, withresistance Rp, and the relative voltage transfer characteristic where the differentregiens of operation of the transistor are shown.Design the inverter of question (a), by ehoosing the smaller possible value ofRp, to work generating a static power dissipation smaller than 5 mW whenoperating with voltage bias l'oD -5V and high input voltage FH= VDD. For thecaleulation consider that the threshold voltage of the transistor is negligiblecompared to the high input voltage ViH >> Vi and that B= 1500 µV/A. Stateany assumption and consider the absolute value of the current for the calculationof the power.Verify that with the value ef smaller resistance possible found in (b) thetransistor is operating in the linear region.

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Calculate the gate to source voltage VGs for a NMOS transistor with B 2200 HA/V, V=1 V and operating in saturation with a transconductance gm 5 mS. %3D %3D Draw the small signal equivalent circuit model valid in the mid-band frequency range for the circuit shown in Figure 1 and identify the kind of amplifier formed by the NMOS transistor M1. Clearly state any assumption. Using two transistors nominally identical to MI and the configuration shown in Figure 1, design a common source voltage amplifier with improved gain. Draw the mid-band frequenci

Calculate the gate to source voltage VGs for a NMOS transistor with B 2200 HA/V, V=1 V and operating in saturation with a transconductance gm 5 mS. %3D %3D Draw the small signal equivalent circuit model valid in the mid-band frequency range for the circuit shown in Figure 1 and identify the kind of amplifier formed by the NMOS transistor M1. Clearly state any assumption. Using two transistors nominally identical to MI and the configuration shown in Figure 1, design a common source voltage amplifier with improved gain. Draw the mid-band frequenci

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

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Question

Calculate the gate to source voltage VGs for a NMOS transistor with B=2200
HA/V, V= LV and operating in saturation with a transconductance g 5 mS.
Draw the small signal equivalent circuit model valid in the mid-band frequeney
range for the circuit shown in Figure 1 and identify the kind of amplifier formed
by the NMOS transistor Ml. Clearly state any assumption.
Using two transistors nominally identical to MI and the configuration shown in
Figure 1, design a còmmon source voltage amplifier with improved gain. Draw
the mid-band frequency range for the resulting circuit in the hypothesis that the
value R, is very big (open circuit) and state what kind of configuration you used.
Explain why the resulting output impedance is bigger when compared to a
single stage common source amplifier.
R,
Rp
M1
out
Cs
R,
Rs
I'ss =0V
Figure I
Draw the schematie cireuit for a resistively loaded NMOS inverter, with
resistance Rp, and the relative voltage transfer characteristic where the different
regiens of operation of the transistor are shown.
Design the inverter of question (a), by ehoosing the smaller possible value of
Rp, to work generating a static power dissipation smaller than 5 mW when
operating with voltage bias l'oD -5V and high input voltage FH= VDD. For the
caleulation consider that the threshold voltage of the transistor is negligible
compared to the high input voltage ViH >> Vi and that B= 1500 µV/A. State
any assumption and consider the absolute value of the current for the calculation
of the power.
Verify that with the value ef smaller resistance possible found in (b) the
transistor is operating in the linear region.

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