C1. Consider a main memory with size 4GB with cache size 16 KB and memory block is 8 bytes. Assume that the memory word is 1 byte. Answer the following questions: a. How many address bits are required to address the main memory locations? b. How many lines are there in the cache memory? c. Determine how to split the address (s-f, 1, w) for direct mapping. d. Determine how to split the address (s-d, d, w) for set associative mapping. Assume each cache set is 2 lines of cache.
C1. Consider a main memory with size 4GB with cache size 16 KB and memory block is 8 bytes. Assume that the memory word is 1 byte. Answer the following questions: a. How many address bits are required to address the main memory locations? b. How many lines are there in the cache memory? c. Determine how to split the address (s-f, 1, w) for direct mapping. d. Determine how to split the address (s-d, d, w) for set associative mapping. Assume each cache set is 2 lines of cache.
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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![C1. Consider a main memory with size 4GB with cache size 16 KB and memory block is 8 bytes.
Assume that the memory word is 1 byte. Answer the following questions:
a. How many address bits are required to address the main memory locations?
b. How many lines are there in the cache memory?
c. Determine how to split the address (s-r, r, w) for direct mapping.
d. Determine how to split the address (s-d, d, w) for set associative mapping. Assume each cache
set is 2 lines of cache.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Fd5e12461-18b3-4490-bd62-c7f52c0b7def%2Faf72d8d7-c9ad-4da7-a3b5-1a1df0f8637b%2Ftyveir_processed.jpeg&w=3840&q=75)
Transcribed Image Text:C1. Consider a main memory with size 4GB with cache size 16 KB and memory block is 8 bytes.
Assume that the memory word is 1 byte. Answer the following questions:
a. How many address bits are required to address the main memory locations?
b. How many lines are there in the cache memory?
c. Determine how to split the address (s-r, r, w) for direct mapping.
d. Determine how to split the address (s-d, d, w) for set associative mapping. Assume each cache
set is 2 lines of cache.
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