Bus d'adresse Ox0 0 A7 0 A6 0 AS 0 A4 Oxo 0 A3 0 A2 0 A1 O AO Bus de contrôle Écriture Lecture Bus de données Mémoire d'Instructions Adr Adr Ctr Ctr Ctr Ox Mémoire de données Clavier Écran 0 EN Data Data EN Data ΕΝ Data EN АО A1 DO D1 PACOTEGID u D3 D2 What is the theoretical maximum number of registers that can be supported by this computer's nstruction set?
Bus d'adresse Ox0 0 A7 0 A6 0 AS 0 A4 Oxo 0 A3 0 A2 0 A1 O AO Bus de contrôle Écriture Lecture Bus de données Mémoire d'Instructions Adr Adr Ctr Ctr Ctr Ox Mémoire de données Clavier Écran 0 EN Data Data EN Data ΕΝ Data EN АО A1 DO D1 PACOTEGID u D3 D2 What is the theoretical maximum number of registers that can be supported by this computer's nstruction set?
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
Transcribed Image Text:Bus d'adresse
Oxo
0 A7
0 A6
0 A5
0 A4
0x0
0 A3
0 A2
0 A1
0 AO
Bus de contrôle
Écriture
Lecture
Bus de données
Mémoire
d'Instructions
Adr
Adr
Ctr
Ctr
Ctr
Clavier
Mémoire
de données
Écran
Ox 0
EN
Data
Data
EN
Data
EN
Data
EN
АО
DO
D1
PACOTEN
A1
D3 D2
D
What is the theoretical maximum number of registers that can be supported by this computer's
instruction set?
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