B3 A3 B2 A2 B1 A1 Во Ao M Co C4 C3 C2 FA FA FA FA C S3 S2 S So FIGURE 4.13 Four-bit adder-subtractor (with overflow detection)

Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Chapter1: Computer Networks And The Internet
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1) The adder–subtractor circuit of Fig. 4.13 has the following values for mode input M and data inputs A and B.
     M   A       B
(a) 0 0111 0110
(b) 0 1000 1001
(c) 1 1100 1000
(d) 1 0101 1010
(e) 1 0000 0001
In each case, determine the values of the four SUM outputs, the carry C, and overflow V.

 

 

B3
A3
B2
A2
BỊ
A1
Во
Ao
M
C4
C3
C2
Co
FA
FA
FA
FA
S3
S2
So
FIGURE 4.13
Four-bit adder-subtractor (with overflow detection)
Transcribed Image Text:B3 A3 B2 A2 BỊ A1 Во Ao M C4 C3 C2 Co FA FA FA FA S3 S2 So FIGURE 4.13 Four-bit adder-subtractor (with overflow detection)
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