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b. T (P T Q) = P A Ų c. (P ↑ P) ↑ (Q ↑ Q) = P v Q d. P↑ (Q ↑ Q) = P → Q

b. T (P T Q) = P A Ų c. (P ↑ P) ↑ (Q ↑ Q) = P v Q d. P↑ (Q ↑ Q) = P → Q

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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**Transcription:** The NAND connective is important because it only takes two transistors to build an electronic circuit that computes the NAND of two signals: ![Logic Gate Circuit Diagram](transistor-circuit-image) Such a circuit is called a *logic gate*. Moreover, it is possible to build logic gates for the other logical connectives entirely out of NAND gates. Demonstrate this by proving the following equivalences in parts (b), (c), and (d) using the laws of logical equivalence and the fact that \( P \uparrow Q \equiv \neg (P \land Q) \). b. \((P \uparrow Q) \uparrow (P \uparrow Q) \equiv P \land Q\) c. \((P \uparrow P) \uparrow (Q \uparrow Q) \equiv P \lor Q\) d. \(P \uparrow (Q \uparrow Q) \equiv P \rightarrow Q\) **Explanation of the Circuit Diagram:** The diagram displays a basic electronic circuit using two transistors to implement a NAND gate. In this setup: - The circuit receives two input signals, labeled as \( p \) and \( q \). - Each input is connected to the base of a separate transistor. - The emitters of both transistors are connected to ground. - Resistors are present in series with each transistor's base. - The collectors of the transistors are connected together, providing the output signal, marked as \( p \uparrow q \). - A power supply, labeled as \( V_{cc} \), is connected to the joint collectors. This configuration allows the circuit to output the NAND of the two input signals.
Transcribed Image Text:**Transcription:** The NAND connective is important because it only takes two transistors to build an electronic circuit that computes the NAND of two signals: ![Logic Gate Circuit Diagram](transistor-circuit-image) Such a circuit is called a *logic gate*. Moreover, it is possible to build logic gates for the other logical connectives entirely out of NAND gates. Demonstrate this by proving the following equivalences in parts (b), (c), and (d) using the laws of logical equivalence and the fact that \( P \uparrow Q \equiv \neg (P \land Q) \). b. \((P \uparrow Q) \uparrow (P \uparrow Q) \equiv P \land Q\) c. \((P \uparrow P) \uparrow (Q \uparrow Q) \equiv P \lor Q\) d. \(P \uparrow (Q \uparrow Q) \equiv P \rightarrow Q\) **Explanation of the Circuit Diagram:** The diagram displays a basic electronic circuit using two transistors to implement a NAND gate. In this setup: - The circuit receives two input signals, labeled as \( p \) and \( q \). - Each input is connected to the base of a separate transistor. - The emitters of both transistors are connected to ground. - Resistors are present in series with each transistor's base. - The collectors of the transistors are connected together, providing the output signal, marked as \( p \uparrow q \). - A power supply, labeled as \( V_{cc} \), is connected to the joint collectors. This configuration allows the circuit to output the NAND of the two input signals.
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The given equations are:

b. P↑ Q ↑P↑ Q≡P ∧ Qc. P↑ Q ↑Q↑ Q≡P ∨ Qd. P↑Q↑ Q≡P→Q

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