B. Design a counter which counts from (0011)2 to (1110)2 using 74x163 IC and external gates. The counter should start counting when an active-low ENABLE (EN_L) input is asserted. CLR1 CLK 2 A3 16 Vcc 15 RCO QA | QB 12 Qc 14 4 13 C5 6. 11 ENPO7 10 ENT GND 8 9 LOAD Fig. 1. Block diagram of 74x163 IC. OON ON

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B. Design a counter which counts from (0011)2 to (1110)2 using 74x163 1C and external
gates. The counter should start counting when an active-low ENABLE (EN_L) input is
asserted.
CLR 1 U160 Vcc
CLK O2
A3
15
RCO
QA
13 QB
12 QC
11 QD
14
D6
ENPU7
10] ENT
GND
8
LOAD
Fig. 1. Block diagram of 74x163 IC.
Transcribed Image Text:B. Design a counter which counts from (0011)2 to (1110)2 using 74x163 1C and external gates. The counter should start counting when an active-low ENABLE (EN_L) input is asserted. CLR 1 U160 Vcc CLK O2 A3 15 RCO QA 13 QB 12 QC 11 QD 14 D6 ENPU7 10] ENT GND 8 LOAD Fig. 1. Block diagram of 74x163 IC.
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