Assume an instruction cache miss rate for gcc of 2% and a data cache miss rate of 4%. If a machine has a CPI of 2 without any memory stalls and the miss penalty is 40 cycles for all misses, determine how much faster a machine would run with a perfect cache that never missed. Assume 36% combined frequencies for load and store instructions

Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Assume an instruction cache miss rate for gcc of 2% and a data cache miss
rate of 4%. If a machine has a CPI of 2 without any memory stalls and the
miss penalty is 40 cycles for all misses, determine how much faster a
machine would run with a perfect cache that never missed. Assume 36%
combined frequencies for load and store instructions
Transcribed Image Text:Assume an instruction cache miss rate for gcc of 2% and a data cache miss rate of 4%. If a machine has a CPI of 2 without any memory stalls and the miss penalty is 40 cycles for all misses, determine how much faster a machine would run with a perfect cache that never missed. Assume 36% combined frequencies for load and store instructions
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