Assignment: Use Keil uvision 5 software to develop an ARM assembly program with the followings specifications: a) Declare an array of at least 10 8-bit unsigned integer numbers in the memory with initial values. e.g. 34, 56, 27, 156, 200, 68, 128,235, 17, 45 b) Find the sum of all elements of the array and store it in the memory, e.g. variable SUM. c) find the sum of the even numbers in this array and store it in the memory, e.g. variable EVEN d) Find the largest power of 2 divisor that divides into a number exactly for each element in the array and store it in another array in the memory. You have to use a procedure (function), POW2, which takes an integer as an input parameter and return its largest power of 2. For example, POW(52) would return 4, where POW(56) would return 8, and so on. Hint: You can find the largest power of 2 dividing into a number exactly by finding the rightmost bit of the number. For example, (52) 10 (110100): has its rightmost bit in the 4's place, so the largest power of 2 divisor is 4: (56)=(111000): has the rightmost bit in the 8's place, so its largest power of 2 divisor is 8.

Assignment: Use Keil uvision 5 software to develop an ARM assembly program with the followings specifications: a) Declare an array of at least 10 8-bit unsigned integer numbers in the memory with initial values. e.g. 34, 56, 27, 156, 200, 68, 128,235, 17, 45 b) Find the sum of all elements of the array and store it in the memory, e.g. variable SUM. c) find the sum of the even numbers in this array and store it in the memory, e.g. variable EVEN d) Find the largest power of 2 divisor that divides into a number exactly for each element in the array and store it in another array in the memory. You have to use a procedure (function), POW2, which takes an integer as an input parameter and return its largest power of 2. For example, POW(52) would return 4, where POW(56) would return 8, and so on. Hint: You can find the largest power of 2 dividing into a number exactly by finding the rightmost bit of the number. For example, (52) 10 (110100): has its rightmost bit in the 4's place, so the largest power of 2 divisor is 4: (56)=(111000): has the rightmost bit in the 8's place, so its largest power of 2 divisor is 8.

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Similar questions

Please solve and show all work. For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: f = (g+i+2) + (h − 8); B[8] = A[i-9] + A[j+8] + 7;
Assembly Language Question: You are given the following array in your data segment arr word 0F8h, 16h, 0DBh, 77h write ONE instruction to toggle the least significant bit of the second and third elements in the array(Toggle means to change a 0 to 1 and a 1 to 0), For example, after your instruction executes, the array should have: 0F8h, 17h, 0DAh, 77h.
Complete the following table: MIPS Instruction op code rs rt rd shamt funct imm. /address Hexadecimal Representation add $t4, $s2, $s1 addi $s0, $t0, 123 lw $s6, -88($t7) Note: In MIPS register file, temporary registers $t0-$t7 have indices 8-15 (respec- tively). Also, the saved registers $s0-$s7 have indices 16-23 (respectively).
Please solve and show all work. Thank you. Translate the following MIPS code to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. addi $t0, $s6, 4 add $t1, $s6, $0 sw $t1, 0($t0) lw $t0, 0($t0) add $s0, $t1, $t0
4. The following problems deal with translating from C code to MIPS code or MIPS code to C code. Assume that the signed variables f, g, h and i are assigned to registers $s0, $1, $2, $3 respectively. Assume the base address of the integer arrays A and B are in registers $s4 and $55 respectively. Translate the following MIPS code to C code. Please indicate which elements of integer array A and B are modified by this code. addi $t0, $1, 6 sll $t0, $t0, 4 add $t0, $t0, $5 Iw $t0, 0($t0) sw $t0, 4($4)
I have been searching in my textbook and could not find anything to help me solve this problem. Could anyone help me please? Registers in RISC-V are 64-bit. For the sake of simplicity, consider the following instructions operating on 32-bit registers. Assume that registers x5 and x6 hold the values 0xBBBBBBBB and 0x00000000, respectively. What is the value in x6 for the followingslli x6, x5, 6 Using the result from the part above, what is the value in x6 for the following instruction.srli x6, x6, 6
C language please use both the array notation and the pointer notation(e.g., *(pioBase+0)) to access the registers (e.g., pioBase[0]) (a) Set a base address for a generic PIO at 0x10008000 called pioBase. Assume this is just an 8-bitPIO port.(b) Set all the odd-numbered pins of this GPIO to inputs. Leave the even-numbered pins as outputs.
b) With the aid of Visual Studio, trace the result for each of the instruction in Code Segment. Show or explain your answers in hexadecimal format. (i) DATA Arrl WORD 50h, 60h, 70h, 80h Arr2 DWORD 300h, 400h, 500h, 600h .CODE MOV CX , [Arrl+2] MOV DX , [Arrl+6] MOV EBX , [Arr2+8] (ii) .DATA Datal SBYTE -60 .CODE MOV AL , Datal CBW MOV BL , +7 IDIV BL (ii) DATA Arr3 WORD 800h, 900h, 1000h .CODE MOV EDI , OFFSET Arr3 MOV BX , [EDI] ADD EDI , TYPE Arr3 ADD BX , [EDI] ADD EDI , 2 ADD BX , [EDI]
Can someone assist with this? Thank &
Please look at the entire text below. Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] = A[i−j] Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j] Assume that registers $s0 and $s1 hold the values 0x80000000 and 0xD0000000, respectively. What is the value of $t0 for the following assembly code? add $t0, $s0, $s1 Is the result in $t0 the desired result, or has there been an overflow? For the contents of registers $s0 and $s1 as…
(A) Find the phicycal address if (BP) = 0100H , (SI) = 0200H , (SS) = 2000H and a displacement of 10H, of the instruction MOV AL , [BP+SI+10H]. Which the name of Addressing Modes? (B) Find the result of the following: 1111 - 1111H+ 110010111011B
3 This question is about Digital Logic (a) Briefly explain how several Full-Adder circuits can be chained together to add up multi-bit values. (b) A computer is being designed using a microprocessor with a 16-bit address bus (A0 -A15). The 64K address space is to be split and allocated to RAM, ROM and I/0 hardware as follows: Address Range (hex) Contains Select Signal Ox0000-OX0OFF ROM ROMCS Ox1000-0X1FFF RAM Bank 1 RAMICS I/O RAM Bank 2 Ox2010-Ox2012 IOCS Оx8000-0xFFF RAM2CS The rest of the address space is unused. Note: As with many computer systems, it its only necessary to decode the address to sufficiently identify each of the four stages above. It is acceptable for some parts to be decodeable by more than one address provided these extra addresses do not over- lap any of the other specified address ranges. Using a combination of AND, OR and NOT gates and the signals for the address bus (A0- A15) that contain the address in binary form: () Derive the equation for a logic signal,…