As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual addresses to physical addresses. This exercise shows how this table must be updated as addresses are accessed. The following data constitute a stream of virtual byte addresses as seen on a system. Assume 4 KiB pages, a fourentry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. Decimal 4669 hex |2227 |13916 |34587 |48870 |12608 |49225 0x123d 0x08b3| Ox365c |0x871b|0xbee6 | 0x3140 |0xc049 TLB Physical Page Time Since Last Valid Tag Number Access Osb 12 Ox7 1. Ox3 3. Ox4 Page table Index Valid Physical Page or In Disk Disk Disk 11 Disk 4 Disk Disk b 12 [10] <§5.7> For each access shown above, list • whether the access is a hit or miss in the TLB, • whether the access is a hit or miss in the page table, • whether the access is a page fault, • the updated state of the TLB.

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Chapter 5.16, Problem 1E
Bookmarked
Show all steps:
ON
As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual
addresses to physical addresses. This exercise shows how this table must be updated as
addresses are accessed. The following data constitute a stream of virtual byte addresses as
seen on a system. Assume 4 KiB pages, a fourentry fully associative TLB, and true LRU
replacement. If pages must be brought in from disk, increment the next largest page number.
Decimal 4669
49225
0x123d 0x08b3 0x365c |0x871b | 0xbee6 |0x3140 |0xc049
2227
13916
34587
48870
12608
hex
TLB
Physical Page
Time Since Last
Valid
Tag
Number
Access
1.
Oxb
12
1.
Ox7
Ox3
6
3
Ox4
Page table
Index
Valid
Physical Page or in Disk
1
Disk
Disk
1.
4
1.
9
11
Disk
7
1.
4
Disk
Disk
1.
by
1
12
[10] <§5.7> For each access shown above, list
• whether the access is a hit or miss in the TLB,
• whether the access is a hit or miss in the page table,
• whether the access is a page fault,
• the updated state of the TLB.
!!!
Transcribed Image Text:Chapter 5.16, Problem 1E Bookmarked Show all steps: ON As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual addresses to physical addresses. This exercise shows how this table must be updated as addresses are accessed. The following data constitute a stream of virtual byte addresses as seen on a system. Assume 4 KiB pages, a fourentry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. Decimal 4669 49225 0x123d 0x08b3 0x365c |0x871b | 0xbee6 |0x3140 |0xc049 2227 13916 34587 48870 12608 hex TLB Physical Page Time Since Last Valid Tag Number Access 1. Oxb 12 1. Ox7 Ox3 6 3 Ox4 Page table Index Valid Physical Page or in Disk 1 Disk Disk 1. 4 1. 9 11 Disk 7 1. 4 Disk Disk 1. by 1 12 [10] <§5.7> For each access shown above, list • whether the access is a hit or miss in the TLB, • whether the access is a hit or miss in the page table, • whether the access is a page fault, • the updated state of the TLB. !!!
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