ADD PC Instruction: ADOR Instruction Memory RS RT RD Register File WD ALU ADDR Data RD Memory wo IF Instruction Fetch EX Instruction Decode Execute/ Address Calc Memory Access WB Write Back ID МЕМ Task Lists 1. How many pipeline stages has been created into the above diagram, Identify 2. Determine the name of the pipeline registers from the diagram. 3. Calculate the width of each of the pipelined registers and show the breakdown of the calculations
ADD PC Instruction: ADOR Instruction Memory RS RT RD Register File WD ALU ADDR Data RD Memory wo IF Instruction Fetch EX Instruction Decode Execute/ Address Calc Memory Access WB Write Back ID МЕМ Task Lists 1. How many pipeline stages has been created into the above diagram, Identify 2. Determine the name of the pipeline registers from the diagram. 3. Calculate the width of each of the pipelined registers and show the breakdown of the calculations
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
Related questions
Question
16 bit ALU
16 bit Register
plz ans task 1,2,3
![ADO
PC
Instruction
ADOR
RD
Instruction
Memory
RS
RT
RD
RD1
Zero
Register File
ALU
WD
RD2
ADDR
Data
Memory RD
wo
IF
Instruction Fetch
ID
Instruction Decode Execute/ Address Calc.
EX
МЕМ
Memory Access
WB
Write Back
Task Lists
1. How many pipeline stages has been created into the above diagram, Identify
2. Determine the name of the pipeline registers from the diagram.
3. Calculate the width of each of the pipelined registers and show the breakdown of the calculations](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Fb1c8c56c-5ebf-4d8f-a9e2-a2565fd38491%2F7f58e715-9731-46d3-bcc5-5f966bc06233%2Fwbmxask_processed.png&w=3840&q=75)
Transcribed Image Text:ADO
PC
Instruction
ADOR
RD
Instruction
Memory
RS
RT
RD
RD1
Zero
Register File
ALU
WD
RD2
ADDR
Data
Memory RD
wo
IF
Instruction Fetch
ID
Instruction Decode Execute/ Address Calc.
EX
МЕМ
Memory Access
WB
Write Back
Task Lists
1. How many pipeline stages has been created into the above diagram, Identify
2. Determine the name of the pipeline registers from the diagram.
3. Calculate the width of each of the pipelined registers and show the breakdown of the calculations
![tMBMVB
·EX/MBM-
0000
0000
ID/EX
ALU OP
000
0000
0001
.0000
0000
:0002
0000
ten o'
Zero
0003
.0000
RegWrite
stsel A ch
MEMWB
Register
ALU
0000
ID/EX
EXMEN
O Mem ToReg
0000
0000
MemToWrite
MBMWB
0000 06
0001
IF/ID
Looool
10000
to o
.0000
Looool
0000
MLX
0002
0000
PMRM
EXMBM
0003
.0000
MLEX
ID/EX
sel
Cout O
CLK
OpCde
0-0-0-0
Dest Reg
OALUSre
Overflow
Reset PC
sign
4.
16
exterd
ID/EX
MemTo Reg
0000](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Fb1c8c56c-5ebf-4d8f-a9e2-a2565fd38491%2F7f58e715-9731-46d3-bcc5-5f966bc06233%2F3vk8zt_processed.png&w=3840&q=75)
Transcribed Image Text:tMBMVB
·EX/MBM-
0000
0000
ID/EX
ALU OP
000
0000
0001
.0000
0000
:0002
0000
ten o'
Zero
0003
.0000
RegWrite
stsel A ch
MEMWB
Register
ALU
0000
ID/EX
EXMEN
O Mem ToReg
0000
0000
MemToWrite
MBMWB
0000 06
0001
IF/ID
Looool
10000
to o
.0000
Looool
0000
MLX
0002
0000
PMRM
EXMBM
0003
.0000
MLEX
ID/EX
sel
Cout O
CLK
OpCde
0-0-0-0
Dest Reg
OALUSre
Overflow
Reset PC
sign
4.
16
exterd
ID/EX
MemTo Reg
0000
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