A. Decimal Binary Octal Hexadecimal 23 1101.1 37.2 2D.C 14 В. BCD Codes 2421 8,4,-2.-1 8421 0110 Excess-3 1011 1111 0111

....... is the decimal symbol for hexadecimal 3AD

Q5 (a) Discuss, the major dıfferences between ticld programmable gatc arrays (FPGAS) and programmable logie devices (PLDS. where an FPGA may be approprate in a streamıng TV system. Simple multiplexers can be used to mimic a number of two-input logic functions by appropriate mapping of nputs X X, and SEL Show how the multiplexer shown in figure Q5a can be used to perform the function F= AOB (b) SEL Figure Q5a Figure Q5b (over) shows the schematic of a Xilinx 3000 sennes logic cell M Label the configuration bits of the various multiplexers n the celL with zeroed configuration bits selecting the topmost input to each multuplexer. Each multiplexer has -2 ns, the combinatorial loge block is guaranteed to have WS7 ns, and the D-type flip-flops have t4 ns and r 1 ns (c) We wish to construct a two-bit counter from this logie cell. where Q, and Q are the high and low order outputs of the counter, CLK is the clock signal, AR is an asynchronous reset signal, EN enables the counter, and LD allows…

H.W :- 1) A four logic-signal A,B,C,D are being used to represent a 4-bit binary number with A as the LSB and D as the MSB. The binary inputs are fed to a logic circuit that produces a logic 1 (HIGH) output only when the binary number is greater than 01102-610. Design this circuit. 2) repeat problem 1 for the output will be 0 (LOW) when the binary input is less than 01112-710- Saleem Lateef

Design a system of OpAmps using a summer and inverter that produces the output 3v1 - 7v2

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8-LEDS are connected to PORTC of an AVR ATmega16 microcontroller. Write a program to control the LEDS to behave in a sequence as shown in the figure toggling at each interval of 800ms delay time state and stepping to return back in the same sequence to initial state looping for 6 times 00

Excess-3 code is significant for arithmetic operations as it overcomes shortcoming encountered while using 8421 BCD code to add two decimal digits whose sum exceeds 9. Excess-3 arithmetic uses different algorithm than normal non-biased BCD or binary positional number system.  An electronics company has hired your services to design a code converter that converts Binary Coded Decimal (BCD) code for it. Design the converter.

Q2/A) Design 8x1 multiplexer using 2x1 multiplexer? Q2 B)Simplify the Logic circuit shown below using K-map then draw the Simplified circuit? Q2/C) design logic block diagram for adding 12 to 5 using full adder showing the input for each adder?

If you were to program a device that had a 4-bit ADC converter to read an input signal, and then command an output PWM signal, what are the duty cycle percentages of the output signals using the assumption that they are evenly separated to give you the full range of potential signals. (i.e. 0% --> 100%). Show your work or explain how you found your answer.