(a) Suppose the register status is (x8, 910, 210) = (0, 0, 1), which register(s) should step and why? (b) Suppose the register status is (x8, 910, 210) = (0, 1, 1), which register(s) should (c) Suppose current register status is (x8, 910, 210) register status where the cipher makes the same next step. step? (1, 0, 1). Please list all

(a) Suppose the register status is (x8, 910, 210) = (0, 0, 1), which register(s) should step and why? (b) Suppose the register status is (x8, 910, 210) = (0, 1, 1), which register(s) should (c) Suppose current register status is (x8, 910, 210) register status where the cipher makes the same next step. step? (1, 0, 1). Please list all

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Note: The notation from this problem is from Understanding Cryptography by Paar and Pelzi. Suppose you have an LFSR with 6 state bits. The first 12 bits of output produced by this LFSR are 101011100010 = 80818283848586878889810811- The first bit produced is the leftmost bit and the bit most recently produced is the rightmost bit. a) What is the initial state of the LFSR? Please enter your answer as unspaced binary digits (e.g. 010101 to represent 85 = 0, $4 = 1, 83 = 0, 82 = 1, 81 = 0, 80 = 1). b) What are the tap bits of the LFSR? Please enter your answer as unspaced binary digits (e.g. 010101 to represent p = 0, P₁ = 1, P3 = 0, P2 = 1, P₁ = 0, Po = 1).
The following paging system has 64KB main memory, which is divided into 16 frames (frame numbers are from 0 to 15). Suppose the process A has 4 pages. The page numbers are 0, 1, 2, and 3, which are loaded to frame 9, 0, 1, and 14, respectively. What is the length of process A? (ii) For logical addresses 0001 0000 0100 1000 and 0011 0000 0110 0011 (all logical addresses are binary values), convert them to the physical address in the main memory.
Name the mode of operation that uses nonce? a. Cipher Block Chaining (CBC) b. Counter (CTR) c. Output Feedback (OFB) d. Cipher Feedback (CFB)
Please and thank you. An external event is sensed using polling with period P. It takes 100 cycles to processthe event. Processor frequency is 48 MHz. Before starting a new period, the previouspolling task should have finished. The relative deadline for processing an event is 10μs.(a) Determine the range of feasible polling periods? (b) Suppose now that an unrelated interrupt may occur and the interrupt has higher priority than the code for processing the polling event. Including all overhead, it takes 40 cycles to process the interrupt. The minimum time between two subsequent interrupts is T. Suppose that T is larger than 140 cycles. Determine the range of feasible polling periods.
Suppose you have a byte-addressable computer using fully associative mapping with 16-bit main memory addresses and 32 blocks of cache. If each block contains 16 bytes, determine the size of the tag field, and show how you arrived at the result.
Briefly state two differences between a cryptosystem using ECB mode and one using CBC mode.
Assume that x11 is initialized to 6 and x12 is initialized to 8. Suppose you executed the code below on a version of the pipeline that does not handle data hazards. Assume the register file is written at the beginning of the cycle and read at the end of a cycle. Therefore, an ID stage will return the results of a WB state occurring during the same cycle. addi x11, x12, 5 add x13, x11, x12 addi x14, x11, 15 add x15, x11, x11 a. What would the final values of register x13, x14, and x15 be? b. Add NOP instructions to the code below so that it will run correctly on a pipeline that does not handle data hazards. c. What would the final values of register x13, x14, and x15 be after adding the nop instructions? Continue on the next page
If each interval shown in Figure 7.11 is 50ns, how long would it take to transfer 10 bytes of data? Devise a bus protocol, using as many control lines as you need, that would reduce the time required for this transfer to take place. What happens if the address lines are eliminated and the data bus is used for addressing instead? (Hint: An additional control line may be needed.)
Prove and explain by details that the avalanche effect is exist in DES algorithm. you don’t have check the existence of avalanche effect using different plaintext only you can use different keys to your answer, you can use at least three different keys. Note be cautions when you change the key. DES use 64 bit key but the bits number 8th ,16th,24th,………64th are not used in encryption ;you will change one bit in the other 56 bits see chapter3 in your LMS).(print all screens)
Consider a pattern history table branch predictor that use one two-bit saturating counter state machine per branch (use the state machine shown below). Fill in the table below with the prediction and the state of the predictor AFTER the branch has executed. Branch Predictor Branch State Outcome Address Pro t PARTSN 11 10 DAIE OXFA00 10 NT N Prekwt 01 Protet mert bli OXFF18 11 00 OXFF24 00 NT OXFF30 01 Branch address Prediction (T/NT) New State OXFF30 OXFF18 OXFF24
Consider a demand-paging system with a paging disk that has an average access/transfer time of 50 ms. Addresses are translated through a page table in main memory, with an access time of 500 ns per memory access. Thus, each memory reference through the page table takes two accesses. To improve this time, we have added a TLB that reduces access time to one memory reference if the page-table entry is in the TLB. Assume that 80% of the accesses are in the TLB and that, of those remaining, 15% (or 3% of the total) cause page faults. We assume that the TLB access time is 20 ns. What is the effective access time?
Let's encrypt a message using RSA: Choose p = 7 and q = 11, and then select e=13. a.Compute d b.Select plaintext message x=7. Produce the ciphertext y using the fast exponentiation algorithm. c. Decrypt the ciphertext (y) to verify that the initial plaintext (x) is produced. Again, please use the fast exponentiation algorithm.