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a) Size of the internal RAM of the 8051 b) Internal ROM size of the 8051 c) The 16-bits data addressing registers and their functions

a) Size of the internal RAM of the 8051 b) Internal ROM size of the 8051 c) The 16-bits data addressing registers and their functions

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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1. Find the following a) Size of the internal RAM of the 8051 b) Internal ROM size of the 8051 c) The 16-bits data addressing registers and their functions d) Registers that can do division e) The flags that are stored in the PSW f) Which register holds the serial data interrupt bits TI and RI g) Address of the stack when the 8051 is reset h) Number of registers banks and their address i) Ports used for external memory access j) The bits that determine timer modes and the register that holds these bits k) Why a low-address byte latch for external memory is needed 1) How an I/O pin can be both an input and output m) Which port has no alternative functions 2. Write programs that will accomplish the desired tasks listed below, using as few lines of code as possible. Use only opcodes that have been covered in class. Comment on each line of code. a) Place the number 3Bh in internal RAM locations 30h to 32h b) copy the data at internal RAM location F1h to R0 and R3 c) Set the SP at the byte address just above the last working register address d) Exchange the contents of the SP and the PSW e) Copy the byte at internal RAM address 27h to external RAM address 27h f) Set Timer 1 to A23DH g) Copy the content of DPTR to registers RO(DPL) and R1(DPH) h) Copy the data in external RAM location 0123h to TLO and the data in external RẠM location 01234h to THO i) Copy the data in internal RAM locations 12h to 15h to internal RAM locations 20h to 23h; copy 12h to 20h, 13h to 21h, etc. .. j) Set the SP register to 07h and PUSH the SP register on the stack; predict what number is PUSHED to address 08h k) Exchange the content of the B register and external RAM address 02CFH 1) Rotate the bytes in registers R0 to R3; copy the data in R0 to R1, R1 to R2, R2 to R3 and R3 to RO m) Copy the external code byte at address 007DH to the SP n) Copy the data in register R5 to external RAM address 032FH o) Copy the internal code byte at address 0300h to external RAM address 0300h p) Swap the bytes in TIMER 0; put TL0 in THO and TH0 in TLO q) Store DPTR in external RAM locations 0123h (DPL) and 02BCH (DPH) r) Exchange both low nibbles of registers RO and R1; put the low nibble of RO in R1, and the low nibble of R1 in RO s) Store the content of register R3 at the internal RAM address contained in R2. (Be sure the address in R2 is legal) t) Store the content of RAM location 20h at the address contained in RAM location 08h u) Store register A at the internal RAM location address in register A v) Copy program bytes 0100h to 0102h to internal RAM locations 20h to 22h w) Copy the data on the pins of port p2 to the port 2 latch x) PUSH the contents of the B register to TMOD y) Copy the contents of external code memory address 0040h to IE z) Show a set of XCH instructions executes faster than PUSH and POP when saving the contents of the A register.
Transcribed Image Text:1. Find the following a) Size of the internal RAM of the 8051 b) Internal ROM size of the 8051 c) The 16-bits data addressing registers and their functions d) Registers that can do division e) The flags that are stored in the PSW f) Which register holds the serial data interrupt bits TI and RI g) Address of the stack when the 8051 is reset h) Number of registers banks and their address i) Ports used for external memory access j) The bits that determine timer modes and the register that holds these bits k) Why a low-address byte latch for external memory is needed 1) How an I/O pin can be both an input and output m) Which port has no alternative functions 2. Write programs that will accomplish the desired tasks listed below, using as few lines of code as possible. Use only opcodes that have been covered in class. Comment on each line of code. a) Place the number 3Bh in internal RAM locations 30h to 32h b) copy the data at internal RAM location F1h to R0 and R3 c) Set the SP at the byte address just above the last working register address d) Exchange the contents of the SP and the PSW e) Copy the byte at internal RAM address 27h to external RAM address 27h f) Set Timer 1 to A23DH g) Copy the content of DPTR to registers RO(DPL) and R1(DPH) h) Copy the data in external RAM location 0123h to TLO and the data in external RẠM location 01234h to THO i) Copy the data in internal RAM locations 12h to 15h to internal RAM locations 20h to 23h; copy 12h to 20h, 13h to 21h, etc. .. j) Set the SP register to 07h and PUSH the SP register on the stack; predict what number is PUSHED to address 08h k) Exchange the content of the B register and external RAM address 02CFH 1) Rotate the bytes in registers R0 to R3; copy the data in R0 to R1, R1 to R2, R2 to R3 and R3 to RO m) Copy the external code byte at address 007DH to the SP n) Copy the data in register R5 to external RAM address 032FH o) Copy the internal code byte at address 0300h to external RAM address 0300h p) Swap the bytes in TIMER 0; put TL0 in THO and TH0 in TLO q) Store DPTR in external RAM locations 0123h (DPL) and 02BCH (DPH) r) Exchange both low nibbles of registers RO and R1; put the low nibble of RO in R1, and the low nibble of R1 in RO s) Store the content of register R3 at the internal RAM address contained in R2. (Be sure the address in R2 is legal) t) Store the content of RAM location 20h at the address contained in RAM location 08h u) Store register A at the internal RAM location address in register A v) Copy program bytes 0100h to 0102h to internal RAM locations 20h to 22h w) Copy the data on the pins of port p2 to the port 2 latch x) PUSH the contents of the B register to TMOD y) Copy the contents of external code memory address 0040h to IE z) Show a set of XCH instructions executes faster than PUSH and POP when saving the contents of the A register.
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