Given VD = 9 V for the configuration shown. Decide: a) I,b) Vs y VDSC) VG y Vcsd) V,18 VIp2 k750 k2o Vp = 9 VVGVpsIpss = 8 mA+.VGs V91 k20.68 k2

Answered: a) I, b) Vs y VDs c) V. y Vcs d) V, 18…

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

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Question

Given VD = 9 V for the configuration shown. Decide:

a) I,
b) Vs y VDS
C) VG y Vcs
d) V,
18 V
Ip
2 k
750 k2
o Vp = 9 V
VG
Vps
Ipss = 8 mA
+.
VGs V
91 k2
0.68 k2

Expert Solution

Introduction.

DC bias of a FET device needs a setting of gate-source voltage VGS to give the desired drain current I_D. For a JFET drain current is limited by the saturation current I_DS. Since the FET has such a high input impedance that no gate current flows and the dc voltage of the gate set by a voltage divider or a fixed battery voltage is not affected or loaded by the FET.

The circuit given in the question is Fiin Fixed bias configuration.

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