A digital counter is a device that generates binary numbers in a specified count sequence. The counter progresses through thespecified sequence of numbers when triggered by an incoming clock waveform, and it advances from one number to the next onlyduring the occurrence of a clock pulse. The counter cycles through the same sequence of numbers continuously so long as there isan incoming clock pulse. You are to build a 3-bit synci. us count-down counter, which is a counter that counts down goesthroug.. Linnni states 111 to 000 and back to 111 to repeat the cou. are to use a positive-edge-tgered JK flip-flops. Inthe first step of the design, you ecu .-Flop inputs (1 column for each flip-flop input) The present state pur uv..design and should enumerate the count sequence. The next state columns should specif wnicn slale wn cuonext, given the present state. For example, if circuit is in a present state of the nevt ate in a down-count sequence would be 0.You should design the FF inputs using the JK FF excitation table which is ri il in Figure 1. 1. Once you had completed the statetransition table, use K .p- -Simulate your counter circuit using Logisim to verify the corr ess of its operation. On your Luy. "-ram label the most andleast significant bits. Figure 2 shows where the JK flin "up unit can be found in the Logisim toolbar menu. 3. After you successfullycomplete the simulation of your circuit, use the uck unit to produce clock pulse that will trigger the flip-flops in the counter circuit.Figure 2 shows where the clock unit can . round in the toolbar menu. 4. Connect the output of the clock pulse generator unit tothe clock inputs of the flip flops in vr synchronous counter circuit. 5. Manually trigger the FFs by clicking on the clock unit in the-- nt a state transition table with the followiy. -dings resent State Next State Flip-* I- an a rolumn for rn bit neeueu .. .*ntarinn tar or of the flip-flop's input as a function of the present state. 2.simucircuit implementations ir ,ur report Extra point: For an additional 3 points added to the final exam grade, connect this circuit tothe full BCD to 7-ser .ent decoder that you may have designed in project 2 (This was the bonus part in project 2). You shouldconnect the out uts of the three flip flops in project 3 to the three inputs of the BCD to 7-segment decoder (B, C, and D) in project 2and observe the LED displays a count down from 7 to 0 and back to 7 after giving continuous pulses of the clock.JK FF Function table JK FF Excitation table J K Qntl Function On On+1 JK 00 a Hold O 0 OX010 Reset 011X101 Set 10X111Q. Comp. 11x0 Fig. 1. JK FF characteristic tables DDD 0.00 we Tu Grund AT Stander Athen Dhe tro DO SHOP Greuta Fig. 2. JK FFand Clock unit in Logisim toolbar.

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A digital counter is a device that generates binary numbers in a specified count sequence. The counter progresses throug specified sequence of numbers when triggered by an incoming clock waveform, and it advances from one number to the during the occurrence of a clock pulse. The counter cycles through the same sequence of numbers continuously so long an incoming clock pulse. You are to build a 3-bit synci. -uS count-down counter, which is a counter that counts down e throug. Linan states 111 to 000 and back to 111 to repeat the cou..ra to use a positive-edge-tr gered JK flip- the first step of the design, you recu. -rt a state transition table with the follow ry. -dinns resent State Next Flop inputs (1 column for each flip-flop input) The present state pui uv.." Larolumn for n bit neeueu .. design and should enumerate the count sequence. The next state columns should specif wnıcn siaie un v.- next, given the present state. For example, if circuit is in a present state of the nev ate in a down-count sequence woule You should design the FF inputs using the JK FF excitation table which is ri l in Figure 1. 1. Once you had completed th transition table, use K .--- Simulate your counter circuit using Logisim to verify the corr ess of its operation. On your Luy. ram label the m least significant bits. Figure 2 shows where the JK flir "up unit can be found in the Logisim toolbar menu. 3. After you sue complete the simulation of your circuit, use the uck unit to produce clock pulse that will trigger the flip-flops in the coun Figure 2 shows where the clock unit can - round in the toolbar menu. 4. Connect the output of the clock pulse generato the clock inputs of the flip flops in vr a synchronous counter circuit. 5. Manually trigger the FFs by clicking on the clock un - faroof the flio-flop's input as a function of the present simu circuit implementations ir ,our report Extra point: For an additional 3 points added to the final exam grade, connect this the full BCD to 7-ser .ent decoder that you may have designed in project 2 (This was the bonus part in project 2). You sh