Please don't use answer already posted on other websites.will leave you feedback!!Thank you! e) Why doesn't MIPS offer the şla instruction?f) Assume that the MIPS instruction i LOOP is located at address 0x8000 0000, and LOOP islocated at 0X8A00 0540. What is the value of the 26-bit address field?Express your answer in BINARY.ANSWER:g) Determine the condition for which the data stored in $t0 must satisfy in order for thefollowing MIPS fragment to branch to Label.ANSWER:ori$t1, $0, 0x111andSt0, $t0, $t1beq $t0, $t1, Label 3. SHORT ANSWERS. Answer the following questions.a) Determine the number of cycles to execute 175 instructions for non-pipelined processor andpipelined processor.ANSWER:Nonpipelined:cyclesPipelined:cyclesb) The starting address of a program in MARS is at 0xc) The operands in a MIPS computer can beandd) The instruction that follows a jump, branch, or load in memory is said to be in aslot.

Hi, As per the QnA policy, we are allowed to solve the first three sub-parts of a multipart question. Actually, this depends on the number of stages. If the instruction has 5 stages: Instruction Fetch (IF) Instruction Decode (ID) OperandFetch (OF) Execute (Ex) Memory write (MW) if each is taking a clock cycle then: For a pipelined processor: If it takes 1 clock cycle for each instruction, then for executing 175 instructions, it takes 175 cycles. For a non pipelined processor: Each instruction takes 5 cycles to complete. For executing 175 instructions it takes 175*5= 875 cycles The starting address of a program in MARS is at 0x00400000 As per the MARS convention, the address from 0x0000000 to 0x00400000 are unused. The MIPS operands could be Registers, Memory Location or Immediate Value.