A) Design a direct-mapped cache memory system. (Draw the block diagram of the cache and the diagram the values of: s, stw, w, r, s-r) B) For the main memory addresses: 7AF9CD H show the following information, in hexadecimal a. Tag. Line, and Word values for a direct-mapped cache. b. Tag and Word values for an associative cache. c. Tag, Set, and Word values for a 4-way set associative cache.

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
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Memory system includes the elements: Main Memory-16 Mbytes, Cache-128Kbytes, Block- 8bytes.
A) Design a direct-mapped cache memory system. (Draw the block diagram of the cache and mention on
the diagram the values of: s, s+w, w, r. s-r)
B) For the main memory addresses: 7AF9CD H show the following information, in hexadecimal format:
a. Tag. Line, and Word values for a direct-mapped cache.
b. Tag and Word values for an associative cache.
c. Tag, Set, and Word values for a 4-way set associative cache.
Transcribed Image Text:Memory system includes the elements: Main Memory-16 Mbytes, Cache-128Kbytes, Block- 8bytes. A) Design a direct-mapped cache memory system. (Draw the block diagram of the cache and mention on the diagram the values of: s, s+w, w, r. s-r) B) For the main memory addresses: 7AF9CD H show the following information, in hexadecimal format: a. Tag. Line, and Word values for a direct-mapped cache. b. Tag and Word values for an associative cache. c. Tag, Set, and Word values for a 4-way set associative cache.
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