(a) Consider the circut below in Figure 4 below. The Widlar current source is designed such that Ig=0.75 mA and Rg -12.75 2 Given vea (SAT) = 0.5 V for all transistors and is =0 when vo is minimum. Find the minimum output voltage (vocastn) ), minimum irput voltage (vi(ain), and the instantaneous power dissipation in transistor Q3 at vormin) v* =5 V v* =5 V ER=1 k2 R_ = 5.5k Q2 Q3 RE2 V=-5 V ww
(a) Consider the circut below in Figure 4 below. The Widlar current source is designed such that Ig=0.75 mA and Rg -12.75 2 Given vea (SAT) = 0.5 V for all transistors and is =0 when vo is minimum. Find the minimum output voltage (vocastn) ), minimum irput voltage (vi(ain), and the instantaneous power dissipation in transistor Q3 at vormin) v* =5 V v* =5 V ER=1 k2 R_ = 5.5k Q2 Q3 RE2 V=-5 V ww
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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Question
![QUESTION 4 I
(a) Consider the circuit belowin Figure 4 below. The Widlar current source is designed such
that Ig=0.75 mA and Rg =12.75 2 Given va(SAT) = 0.5 V for all transistors and i =0
when v, is minimum. Find the minimum output voltage (vocaia)), minimum iput
voltage (v(aia) ), and the instantaneous power dissipation in transistor Q3 at vormin):
v* = 5 V
v* =5 V
R = 1 k2
Oa어
ER = 5.5kn
RE2
V=-5 V
Figure 4](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F3d65ca54-9266-46f3-aebe-39173dca4b36%2F15e83a85-cbf2-4012-9a78-8afaa51a9220%2Fzvisc3q_processed.jpeg&w=3840&q=75)
Transcribed Image Text:QUESTION 4 I
(a) Consider the circuit belowin Figure 4 below. The Widlar current source is designed such
that Ig=0.75 mA and Rg =12.75 2 Given va(SAT) = 0.5 V for all transistors and i =0
when v, is minimum. Find the minimum output voltage (vocaia)), minimum iput
voltage (v(aia) ), and the instantaneous power dissipation in transistor Q3 at vormin):
v* = 5 V
v* =5 V
R = 1 k2
Oa어
ER = 5.5kn
RE2
V=-5 V
Figure 4
![(b) Consider the chss-A common drain amplifier (or source follower amplifier) circuit as
shown in Figure 5. All transistors are matched with transistor parameter Vy = 0.5 V, Ky
= 12 mA/V2, 1 = 0 and Vas(saT) = Vesz - V, Detemine the maximum and minimum
output voltage (vo(mar) and vostmin).
+5 V
M1
R=1 k2
ERL=
1 k2
M3
M2
-5 V
Figure 5](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F3d65ca54-9266-46f3-aebe-39173dca4b36%2F15e83a85-cbf2-4012-9a78-8afaa51a9220%2Ftmbou67_processed.jpeg&w=3840&q=75)
Transcribed Image Text:(b) Consider the chss-A common drain amplifier (or source follower amplifier) circuit as
shown in Figure 5. All transistors are matched with transistor parameter Vy = 0.5 V, Ky
= 12 mA/V2, 1 = 0 and Vas(saT) = Vesz - V, Detemine the maximum and minimum
output voltage (vo(mar) and vostmin).
+5 V
M1
R=1 k2
ERL=
1 k2
M3
M2
-5 V
Figure 5
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