A combinational logic circuit with four inputs will be designed. A, B, C and D are the inputs of the circuit, while Y1, = F (A, B, C, D) and Yo, = F (A, B, C, D) are the outputs of the circuit. (ABCD)2 represents a base 2 4-bit number. Circuit; the remaining 4-bit number divided by 3 will show at the output. This circuit will be implemented using one 4X1 MUX (data selector) and a minimum number of logic gates. a) Create the truth table of the logic circuit  b) Taking S1, B and So = C, design and draw the output Y1, of the 4XI data selector (MUX) selection inputs. Note: (ABCD) represents base 2 4-bit number.

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