A 6.1-V analog input voltage is to be converted to digital using a 4-bit successive approximation register (SAR) ADC whose block diagram is shown in Figure 2. Describe the conversion process by re-drawing Figure 2 at each conversion step and explain the operation of the ADC briefly.

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A 6.1-V analog input voltage is to be converted to digital using a 4-bit successive approximation register (SAR) ADC whose block diagram is shown in Figure 2. Describe the conversion process by re-drawing Figure 2 at each conversion step and explain the operation of the ADC briefly.

b. A 6.1-V analog input voltage is to be
converted
to
digital using
4-bit
DAC
a
successive approximation register (SAR)
ADC whose block diagram is shown in
Figure 2. Describe the conversion process
by re-drawing Figure 2 at each conversion
step and explain the operation of the ADC
briefly.
(30 Points)
6.1 V
SAR
MSB
Figure 2. A SAR ADC block diagram.
Transcribed Image Text:b. A 6.1-V analog input voltage is to be converted to digital using 4-bit DAC a successive approximation register (SAR) ADC whose block diagram is shown in Figure 2. Describe the conversion process by re-drawing Figure 2 at each conversion step and explain the operation of the ADC briefly. (30 Points) 6.1 V SAR MSB Figure 2. A SAR ADC block diagram.
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