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90) Using Boolean algebra, the expression Y = ABC. ABC. ABC. ABC simplifies to: A) Y-BC. BC B) Y- BC• (BC) . Ã.A QY-C D) Y-BC.ABC. ABC 91) A "floating" TTL logic input will usually act like a A) ground. B) active low input. C) logic HIGH. D) logic LOW. 92) The logic gate that generates a LOW (0) output when any one of its inputs are HIGH (1) is the: A) NAND gate. B) AND gate. C) OR gate. D) NOR gate. 93) The logic gates required to implement the logic circuit in the preceding question would be A) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. B) An Exclusive OR gate with inputs B1 and B2 whose output, is fed along with input A, to an AND gate. C) An Exclusive OR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. D) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an AND gate. 94) Using Boolean algebra, the complete simplification of Z (D+E F) (D. E FF gives us A) Z D EF B) Z-EF Oz-DEF) D) Z- (D. EJF

90) Using Boolean algebra, the expression Y = ABC. ABC. ABC. ABC simplifies to: A) Y-BC. BC B) Y- BC• (BC) . Ã.A QY-C D) Y-BC.ABC. ABC 91) A "floating" TTL logic input will usually act like a A) ground. B) active low input. C) logic HIGH. D) logic LOW. 92) The logic gate that generates a LOW (0) output when any one of its inputs are HIGH (1) is the: A) NAND gate. B) AND gate. C) OR gate. D) NOR gate. 93) The logic gates required to implement the logic circuit in the preceding question would be A) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. B) An Exclusive OR gate with inputs B1 and B2 whose output, is fed along with input A, to an AND gate. C) An Exclusive OR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. D) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an AND gate. 94) Using Boolean algebra, the complete simplification of Z (D+E F) (D. E FF gives us A) Z D EF B) Z-EF Oz-DEF) D) Z- (D. EJF

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90) Using Boolean algebra, the expression Y =ABC. ĀBC + ABC. ABC simplifies to: A) Y-BC. BC B) Y- BC• (BC) • Ā.Ā QY-C D) Y-BC.ABC. ABC 91) A "floating" TTL logic input will usually act like a A) ground. B) active low input. C) logic HIGH. D) logic LOW. 92) The logic gate that generates a LOW (0) output when any one of its inputs are HIGH (1) is the: A) NAND gate. B) AND gate. ) OR gate. D) NOR gate. 93) The logic gates required to implement the logic circuit in the preceding question would be A) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. B) An Exclusive OR gate with inputs B1 and B2 whose output, is fed along with input A, to an AND gate. C) An Exclusive OR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. D) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an AND gate. 94) Using Boolean algebra, the complete simplification of Z (D+ E+ F) (D E FF gives us A)Z D EF B) Z - EF Oz-DEF) D) Z- (D+ EJF
Transcribed Image Text:90) Using Boolean algebra, the expression Y =ABC. ĀBC + ABC. ABC simplifies to: A) Y-BC. BC B) Y- BC• (BC) • Ā.Ā QY-C D) Y-BC.ABC. ABC 91) A "floating" TTL logic input will usually act like a A) ground. B) active low input. C) logic HIGH. D) logic LOW. 92) The logic gate that generates a LOW (0) output when any one of its inputs are HIGH (1) is the: A) NAND gate. B) AND gate. ) OR gate. D) NOR gate. 93) The logic gates required to implement the logic circuit in the preceding question would be A) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. B) An Exclusive OR gate with inputs B1 and B2 whose output, is fed along with input A, to an AND gate. C) An Exclusive OR gate with inputs B1 and B2 whose output is fed, along with input A, to an OR gate. D) An Exclusive NOR gate with inputs B1 and B2 whose output is fed, along with input A, to an AND gate. 94) Using Boolean algebra, the complete simplification of Z (D+ E+ F) (D E FF gives us A)Z D EF B) Z - EF Oz-DEF) D) Z- (D+ EJF
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