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7. Computation is performed by a RISC ISA. A = B* (C + D). What is the value in (A) after the execution of code line # 5: (B = 5; C = 10; D = 15) ie: Code line # 5 has been completed. (10 pts) В. 125 D. 25 A. 10 C. Unknown Appelned instuction data path Fetch Decode Eecute Data Memory Wite Back ALU DM MUX Banch address Resut Intructions Dia Front 8.17 A five-stage RISC-ISA pipelined data path. RISC-ISA: Example of assembly program 1. LD 2. LD 3. ADD 4. LD 5. MUL 6. ST R1, R2, R3, R4, R5, (A). (C) (D) R1, R2 (B) R3, R4 R5

7. Computation is performed by a RISC ISA. A = B* (C + D). What is the value in (A) after the execution of code line # 5: (B = 5; C = 10; D = 15) ie: Code line # 5 has been completed. (10 pts) В. 125 D. 25 A. 10 C. Unknown Appelned instuction data path Fetch Decode Eecute Data Memory Wite Back ALU DM MUX Banch address Resut Intructions Dia Front 8.17 A five-stage RISC-ISA pipelined data path. RISC-ISA: Example of assembly program 1. LD 2. LD 3. ADD 4. LD 5. MUL 6. ST R1, R2, R3, R4, R5, (A). (C) (D) R1, R2 (B) R3, R4 R5

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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7. Computation is performed by a RISC ISA. A = B* (C + D). What is the value in (A) after the execution of code line # 5: (B = 5; C = 10; D = 15) ie: Code line # 5 has been completed. (10 pts) A. 10 c. Unknown В. 125 D. 25 A ppelined instruction data path Fetch Data Memory Wite Back Decode Execute 国 ALU MUX Branch address Resut Instructions Data FiGIrE 8.17 A five-stage RISC-ISA pipelined data path. RISC-ISA: Example of assembly program (C) (D) R1, R2 (B) R3, R4 1. LD R1, R2, R3, R4, R5, 2. LD 3. ADD 4. LD 5. MUL 6. ST (A). R5
Transcribed Image Text:7. Computation is performed by a RISC ISA. A = B* (C + D). What is the value in (A) after the execution of code line # 5: (B = 5; C = 10; D = 15) ie: Code line # 5 has been completed. (10 pts) A. 10 c. Unknown В. 125 D. 25 A ppelined instruction data path Fetch Data Memory Wite Back Decode Execute 国 ALU MUX Branch address Resut Instructions Data FiGIrE 8.17 A five-stage RISC-ISA pipelined data path. RISC-ISA: Example of assembly program (C) (D) R1, R2 (B) R3, R4 1. LD R1, R2, R3, R4, R5, 2. LD 3. ADD 4. LD 5. MUL 6. ST (A). R5
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