Problem 4:7-18. Complete the timing diagram in Figure 7-104 for a 74ALS162 withthe indicated input waveforms applied. Assume the initial state is0000.CLRLOADENTENPDCBA0110d1010100!QD-++-QCQBQARCOTIIFIGURE 7-104 Problem 7-18 timing diagram.-E++ ---+ --LJLII ILLI| ||TITD TIE+H-T-E++ --E+-TTI TT---+++-- E+||| |||TT-T+--E+

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Answered: 7-18. Complete the timing diagram in…

7-18. Complete the timing diagram in Figure 7-104 for a 74ALS162 with the indicated input waveforms applied. Assume the initial state is 0000.

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Problem 4:
7-18. Complete the timing diagram in Figure 7-104 for a 74ALS162 with
the indicated input waveforms applied. Assume the initial state is
0000.
CLR
LOAD
ENT
ENP
DCBA
0110
d101
0100!
QD
-++-
QC
QB
QA
RCOTII
FIGURE 7-104 Problem 7-18 timing diagram.
-E++ ---+ --
LJ
LII ILLI
| ||
TITD TI
E+H-T
-E++ --E+-
TTI TT
---+
++-- E+
||| |||
TT-T
+--E+

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