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6. As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual addresses to physical addresses. This exercise shows how this table must be updated as addresses are accessed. Assume 4 KiB pages, a 4-entry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. TLB Valid Tag Physical Page Number Time Since Last Access 1 11 12 4 1 7 1 1 3 6 3 0 4 9 7 Page table Physical Page or in Disk Index Valid 0 1 5 1 0 Disk 2 0 Disk 3 1 6 4 1 9 5 1 11 6 0 Disk 7 1 4 8 0 Disk 9 0 Disk 1 3 a b 1 12 The following data constitutes a stream of virtual addresses as seen on a system: 4669, 13916, 48870. For each access shown above, list (a) whether the access is a hit or miss in the TLB, (b) whether the access is a page fault, (c) the updated state of the TLB and Page Table. 7

6. As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual addresses to physical addresses. This exercise shows how this table must be updated as addresses are accessed. Assume 4 KiB pages, a 4-entry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. TLB Valid Tag Physical Page Number Time Since Last Access 1 11 12 4 1 7 1 1 3 6 3 0 4 9 7 Page table Physical Page or in Disk Index Valid 0 1 5 1 0 Disk 2 0 Disk 3 1 6 4 1 9 5 1 11 6 0 Disk 7 1 4 8 0 Disk 9 0 Disk 1 3 a b 1 12 The following data constitutes a stream of virtual addresses as seen on a system: 4669, 13916, 48870. For each access shown above, list (a) whether the access is a hit or miss in the TLB, (b) whether the access is a page fault, (c) the updated state of the TLB and Page Table. 7

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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Please help me with this computer architecture homework
6. As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual addresses to physical addresses. This exercise shows how this table must be updated as addresses are accessed. Assume 4 KiB pages, a 4-entry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. TLB Valid Tag Physical Page Number Time Since Last Access 1 11 12 4 1 7 1 1 3 6 3 0 4 9 7 Page table Physical Page or in Disk Index Valid 0 1 5 1 0 Disk 2 0 Disk 3 1 6 4 1 9 5 1 11 6 0 Disk 7 1 4 8 0 Disk 9 0 Disk 1 3 a b 1 12 The following data constitutes a stream of virtual addresses as seen on a system: 4669, 13916, 48870. For each access shown above, list (a) whether the access is a hit or miss in the TLB, (b) whether the access is a page fault, (c) the updated state of the TLB and Page Table. 7
Transcribed Image Text:6. As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual addresses to physical addresses. This exercise shows how this table must be updated as addresses are accessed. Assume 4 KiB pages, a 4-entry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. TLB Valid Tag Physical Page Number Time Since Last Access 1 11 12 4 1 7 1 1 3 6 3 0 4 9 7 Page table Physical Page or in Disk Index Valid 0 1 5 1 0 Disk 2 0 Disk 3 1 6 4 1 9 5 1 11 6 0 Disk 7 1 4 8 0 Disk 9 0 Disk 1 3 a b 1 12 The following data constitutes a stream of virtual addresses as seen on a system: 4669, 13916, 48870. For each access shown above, list (a) whether the access is a hit or miss in the TLB, (b) whether the access is a page fault, (c) the updated state of the TLB and Page Table. 7
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