5. Design a circuit with inputs A,B,C, and D. Let the two inputs AB represent a two-bit number with A as the high order bit, and CD represent another two- bit number. That is, the values on AB represent four values 00 (0), 01 (1), 10 (2), and 11 (3). The circuit has three outputs: G, E, and L. Output G, E, and L should be 1 only if the number represented by AB is greater, equal, and less than the number represented by CD, respectively. a. Write the truth table for this circuit. b. Find the minimized logic equations in SOP and POS for each output c. Draw the corresponding all NAND and all NOR gates logic diagram for this circuit. Label all inputs and outputs.

Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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5. Design a circuit with inputs A,B,C, and D. Let the two inputs AB represent a
two-bit number with A as the high order bit, and CD represent another two-
bit number. That is, the values on AB represent four values 00 (0), 01 (1), 10
(2), and 11 (3). The circuit has three outputs: G, E, and L. Output G, E, and L
should be 1 only if the number represented by AB is greater, equal, and less
than the number represented by CD, respectively.
a. Write the truth table for this circuit.
b. Find the minimized logic equations in SOP and POS for each output
c. Draw the corresponding all NAND and all NOR gates logic diagram for
this circuit. Label all inputs and outputs.
Transcribed Image Text:5. Design a circuit with inputs A,B,C, and D. Let the two inputs AB represent a two-bit number with A as the high order bit, and CD represent another two- bit number. That is, the values on AB represent four values 00 (0), 01 (1), 10 (2), and 11 (3). The circuit has three outputs: G, E, and L. Output G, E, and L should be 1 only if the number represented by AB is greater, equal, and less than the number represented by CD, respectively. a. Write the truth table for this circuit. b. Find the minimized logic equations in SOP and POS for each output c. Draw the corresponding all NAND and all NOR gates logic diagram for this circuit. Label all inputs and outputs.
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