4. Design a 4 bit D/A converter using an op-amp summing amplifier (see Figure 8.3). Input voltages of 0 V and 5 V will be used to provide logical low and high inputs, respectively. V1 will be the most significant bit, V2 the next most significant bit, etc. Select the values of Rf and R1, R2 , R3, and R4 to provide an output that will vary from 0 V to - 5 V as the digital input varies from 0000 to 1111. Show the schematic diagram for this circuit.

Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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2.
Pre-
Schematics
1. For
the
R1
1øk
R4
R2
10k
V1
Gnd
VGnd
Figure 8.1
4+12v
R3
R5
Vb R1
47k
33k
Va
Va R2
R7
68k
R4
100k
Gnd
Gnd
Figure 8.2
V1
R1
于8
R1
R1
V4
R1
Gnd
Figure 8.3
Transcribed Image Text:2. Pre- Schematics 1. For the R1 1øk R4 R2 10k V1 Gnd VGnd Figure 8.1 4+12v R3 R5 Vb R1 47k 33k Va Va R2 R7 68k R4 100k Gnd Gnd Figure 8.2 V1 R1 于8 R1 R1 V4 R1 Gnd Figure 8.3
4. Design a 4 bit D/A converter using an op-amp summing amplifier (see Figure 8.3). Input
voltages of 0 V and 5 V will be used to provide logical low and high inputs, respectively. V1
will be the most significant bit, V2 the next most significant bit, etc. Select the values of Rf and
R1, R2 , R3, and R4 to provide an output that will vary from 0 V to - 5 V as the digital input
varies from 0000 to 1111. Show the schematic diagram for this circuit.
Transcribed Image Text:4. Design a 4 bit D/A converter using an op-amp summing amplifier (see Figure 8.3). Input voltages of 0 V and 5 V will be used to provide logical low and high inputs, respectively. V1 will be the most significant bit, V2 the next most significant bit, etc. Select the values of Rf and R1, R2 , R3, and R4 to provide an output that will vary from 0 V to - 5 V as the digital input varies from 0000 to 1111. Show the schematic diagram for this circuit.
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