4. A common-source amplifier is based by R₁ and R₂ as shown below. Assume VTHN= |VTHP|= 0.6 V, λN=2p= 0.05 V-¹, and unCox= 200 μA/V² and upCox= 100 μA/V² (a) Assume Ibias = 0.1 mA. Determine R₁ and R₂ to set Vx as 1 V. Also, determine the drain current ID. Neglect channel-length modulation in the calculation. (b) Based on the obtained Ip in (a). Design Rp to achieve the maximum allow gain of this amplifier. Also, determine the small-signal gain Vout/Vin under this condition. (c) If RD is replaced by a PMOS (W/L= 400) as an active load (biased in the saturation region), plot the small-signal model and determine the small-signal gain of the amplifier. Assume ID is kept the same as in (a). How about if the PMOS is replaced by an idea current source of ID? Determine the small-signal gain under this condition. VDD= 2.5 V Vin R₁ bias R₂ RD VX|| ID out W/L= 200 Vin R₁ bias R₂ VDD= 2.5 V b Vell Vx|| W/L= 400 out W/L= 200

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4. A common-source amplifier is based by R₁ and R₂ as shown below. Assume VTHN=
|VTHP|= 0.6 V, AN=2p= 0.05 V-¹, and unCox= 200 μA/V² and upCox= 100 μA/V²
(a) Assume Ibias = 0.1 mA. Determine R₁ and R₂ to set Vx as 1 V. Also, determine the
drain current ID. Neglect channel-length modulation in the calculation.
(b) Based on the obtained Ip in (a). Design Rp to achieve the maximum allow gain of
this amplifier. Also, determine the small-signal gain Vout/Vin under this condition.
(c) If RD is replaced by a PMOS (W/L= 400) as an active load (biased in the saturation
region), plot the small-signal model and determine the small-signal gain of the
amplifier. Assume ID is kept the same as in (a). How about if the PMOS is replaced by
an idea current source of ID? Determine the small-signal gain under this condition.
VDD= 2.5 V
Vin
R₁
bias
R₂
RD
VX||
ID
out
W/L= 200
R₁
Ibias
Vino
R₂
VDD= 2.5 V
m
voll
_%
W/L= 400
Vout
W/L= 200
Transcribed Image Text:4. A common-source amplifier is based by R₁ and R₂ as shown below. Assume VTHN= |VTHP|= 0.6 V, AN=2p= 0.05 V-¹, and unCox= 200 μA/V² and upCox= 100 μA/V² (a) Assume Ibias = 0.1 mA. Determine R₁ and R₂ to set Vx as 1 V. Also, determine the drain current ID. Neglect channel-length modulation in the calculation. (b) Based on the obtained Ip in (a). Design Rp to achieve the maximum allow gain of this amplifier. Also, determine the small-signal gain Vout/Vin under this condition. (c) If RD is replaced by a PMOS (W/L= 400) as an active load (biased in the saturation region), plot the small-signal model and determine the small-signal gain of the amplifier. Assume ID is kept the same as in (a). How about if the PMOS is replaced by an idea current source of ID? Determine the small-signal gain under this condition. VDD= 2.5 V Vin R₁ bias R₂ RD VX|| ID out W/L= 200 R₁ Ibias Vino R₂ VDD= 2.5 V m voll _% W/L= 400 Vout W/L= 200
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