3 of 3 - + Automatic Zoom 5. A NAND-gate version of a J-K flip-flop is shown below. The present state is Q = 0, Q' = 1 with the CLK off. The inputs are J = K = 1. On the figure, write the inputs and outputs (0 or 1) of all the gates. Then, when CLK → 1, show what inputs and outputs change, and what the next state of Q and Q' become. E.g., if the output of a gate was initially 0, then it changes to 1, you'd write "O → 1" by the output of that gate.
3 of 3 - + Automatic Zoom 5. A NAND-gate version of a J-K flip-flop is shown below. The present state is Q = 0, Q' = 1 with the CLK off. The inputs are J = K = 1. On the figure, write the inputs and outputs (0 or 1) of all the gates. Then, when CLK → 1, show what inputs and outputs change, and what the next state of Q and Q' become. E.g., if the output of a gate was initially 0, then it changes to 1, you'd write "O → 1" by the output of that gate.
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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I just started the section on flip flops and am still leary about looking at them with a nand gate operator. I think I understand but the clock is throwing me off.
Thank you for the help.
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