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2. In comparison to ASIC and PLD, VLSI technology offers better performance smaller size and lower NRE costs. a. True b. False 3. For low volume production, a PLD based implementation of a processor costs less than a full-custom implementation of the same processor. a. True b. False 4. Adding designers to the team reduces the productivity per designer due to conflicts and management issues. a. True b. False 5. One way to improve a processor's performance is to reduce the size of its datapath. a. True b. False 6. The Harvard memory architecture is more suited for pipelined processors. a. True b. False 7. EPROM is erasable and in-system programmable. a. True b. False 8. PSRAM is an SRAM with a permanent battery. a. True b. False 9. DRAM has higher bit density than SRAM a. True b. False 10. The "write-through" cache write mechanism is efficient and creates less bus traffic. a. True b. False

2. In comparison to ASIC and PLD, VLSI technology offers better performance smaller size and lower NRE costs. a. True b. False 3. For low volume production, a PLD based implementation of a processor costs less than a full-custom implementation of the same processor. a. True b. False 4. Adding designers to the team reduces the productivity per designer due to conflicts and management issues. a. True b. False 5. One way to improve a processor's performance is to reduce the size of its datapath. a. True b. False 6. The Harvard memory architecture is more suited for pipelined processors. a. True b. False 7. EPROM is erasable and in-system programmable. a. True b. False 8. PSRAM is an SRAM with a permanent battery. a. True b. False 9. DRAM has higher bit density than SRAM a. True b. False 10. The "write-through" cache write mechanism is efficient and creates less bus traffic. a. True b. False

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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1. A microcontroller offers CPUS with integrated memory and peripheral interfaces. a. True b. False 2. In comparison to ASIC and PLD, VLSI technology offers better performance, smaller size and lower NRE costs. a. True b. False 3. For low volume production, a PLD based implementation of a processor costs less than a full-custom implementation of the same processor. a. True b. False 4. Adding designers to the team reduces the productivity per designer due to conflicts and management issues. a. True b. False 5. One way to improve a processor's performance is to reduce the size of its datapath. а. True b. False 6. The Harvard memory architecture is more suited for pipelined processors. a. True b. False 7. EPROM is erasable and in-system programmable. а. True b. False 8. PSRAM is an SRAM with a permanent battery. a. True b. False 9. DRAM has higher bit density than SRAM a. True b. False 10. The "write-through" cache write mechanism is efficient and creates less bus traffic. a. True b. False
Transcribed Image Text:1. A microcontroller offers CPUS with integrated memory and peripheral interfaces. a. True b. False 2. In comparison to ASIC and PLD, VLSI technology offers better performance, smaller size and lower NRE costs. a. True b. False 3. For low volume production, a PLD based implementation of a processor costs less than a full-custom implementation of the same processor. a. True b. False 4. Adding designers to the team reduces the productivity per designer due to conflicts and management issues. a. True b. False 5. One way to improve a processor's performance is to reduce the size of its datapath. а. True b. False 6. The Harvard memory architecture is more suited for pipelined processors. a. True b. False 7. EPROM is erasable and in-system programmable. а. True b. False 8. PSRAM is an SRAM with a permanent battery. a. True b. False 9. DRAM has higher bit density than SRAM a. True b. False 10. The "write-through" cache write mechanism is efficient and creates less bus traffic. a. True b. False
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