2. Find the ASM chart corresponding to the following description: There are two states, A and B. If in state A and input X is 0, then the next state is A. If in state A and input X is 1, then the next state is B. If in state B and input Y is 1, then the next state is B. If in state B and input Y is 0, then the next state is A. Output Z is equal to 1 while the circuit is in state B. Implement the design using a one flip-flop per state. Find tho ASM fo 3

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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For question 2, please provide a full explanation on how the “one flip flop per state” method works. Thanks.
1 of 3
+
00
Automatic Zoom
S1
01,10,11
CO
01
00,10
UI,II
S2
10
Figure 1: State Diagram
2. Find the ASM chart corresponding to the following description: There are two states, A and B. If in
state A and input X is 0, then the next state is A. If in state A and input X is 1, then the next state
is B. If in state B and input Y is 1, then the next state is B. If in state B and input Y is 0, then
the next state is A. Output Z is equal to 1 while the circuit is in state B. Implement the design
using a one flip-flop per state.
1
3. Find the ASM for a circuit that detects a difference in value in an input signal X at two successive
positive clock edges. If X has different values at two successive positive clock edges, then output Z is
equal to 1 for the next clock cycle. Otherwise, output Z is 0. Implement the control unit using
a Sequence Register and Decoder.
4. Design a digital system that multiplies two unsigned binary numbers by the repeated addition method.
For example, to multiply 5 by 4, the digital system adds the multiplicand four times 5 + 5 + 5 +
5 = 20. Let the multiplicand be in register BR, the multiplier in register AR, and the product
in register PR. An adder circuit adds the contents of BR to PR, and AR is a down-counter. A
zero-detection circuit Z checks when AR becomes zero after each time that it is decremented. Draw
a block diagram of the data path. Design the control by using the one flip-flop per state
method.
Transcribed Image Text:1 of 3 + 00 Automatic Zoom S1 01,10,11 CO 01 00,10 UI,II S2 10 Figure 1: State Diagram 2. Find the ASM chart corresponding to the following description: There are two states, A and B. If in state A and input X is 0, then the next state is A. If in state A and input X is 1, then the next state is B. If in state B and input Y is 1, then the next state is B. If in state B and input Y is 0, then the next state is A. Output Z is equal to 1 while the circuit is in state B. Implement the design using a one flip-flop per state. 1 3. Find the ASM for a circuit that detects a difference in value in an input signal X at two successive positive clock edges. If X has different values at two successive positive clock edges, then output Z is equal to 1 for the next clock cycle. Otherwise, output Z is 0. Implement the control unit using a Sequence Register and Decoder. 4. Design a digital system that multiplies two unsigned binary numbers by the repeated addition method. For example, to multiply 5 by 4, the digital system adds the multiplicand four times 5 + 5 + 5 + 5 = 20. Let the multiplicand be in register BR, the multiplier in register AR, and the product in register PR. An adder circuit adds the contents of BR to PR, and AR is a down-counter. A zero-detection circuit Z checks when AR becomes zero after each time that it is decremented. Draw a block diagram of the data path. Design the control by using the one flip-flop per state method.
Q↑↓
D
2 of 5
2. The ASM for Q2 is shown in Figure 2. The Control Unit is shown in Figure 3.
0
D
+ Automatic Zoom
DQ
Y
X
Figure 2: The Corresponding ASM for Question 2
0
Z
Demux
Y
DQ
Q'
1
Demux
Y
0
ENG
Transcribed Image Text:Q↑↓ D 2 of 5 2. The ASM for Q2 is shown in Figure 2. The Control Unit is shown in Figure 3. 0 D + Automatic Zoom DQ Y X Figure 2: The Corresponding ASM for Question 2 0 Z Demux Y DQ Q' 1 Demux Y 0 ENG
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