2 The 74LS138 is a 3-line-to-8-line decoder with the enable function. Its logic symbol and truth table are shown in Figure decoder. Q2. Write Verilog code for this Inputs Output Enable Select G2A G2B G1 C B|A 01 2 3 4 5 6 7 TX X X X X 11 1 11111 X 1 X|XX[X[1[1 1 1|1 1 |1 | X X 0 X X X11 1 1|1 11 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 110 1 1 1 1 1 |1 0 1010 1 1 0 1 1 1 11 1 0 1 1|1 1 1 0 1 1|1|1 1 10 0 1 1110111 A B C 3 b 4 b d G2A d G2B G1 1 0 1 11 11 1 0 1 1 1 1 1 0 1 1 1 1 1 1 0 1 0| 1|1 11 1 11111 1 0 0 01 Figure Q2 Enable Select Inputs + in Outputs
2 The 74LS138 is a 3-line-to-8-line decoder with the enable function. Its logic symbol and truth table are shown in Figure decoder. Q2. Write Verilog code for this Inputs Output Enable Select G2A G2B G1 C B|A 01 2 3 4 5 6 7 TX X X X X 11 1 11111 X 1 X|XX[X[1[1 1 1|1 1 |1 | X X 0 X X X11 1 1|1 11 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 110 1 1 1 1 1 |1 0 1010 1 1 0 1 1 1 11 1 0 1 1|1 1 1 0 1 1|1|1 1 10 0 1 1110111 A B C 3 b 4 b d G2A d G2B G1 1 0 1 11 11 1 0 1 1 1 1 1 0 1 1 1 1 1 1 0 1 0| 1|1 11 1 11111 1 0 0 01 Figure Q2 Enable Select Inputs + in Outputs
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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Transcribed Image Text:2 The 74LS138 is a 3-line-to-8-line decoder with the enable function. Its logic
symbol and truth table are shown in Figure Q2. Write Verilog code for this
decoder.
Inputs
Output
Enable
Select
G2A| G2B G1 C BA012345 6 7
X X X XX11111111
1 XXX X111|1|1
A
| X
|X
111
C
2 b
X 0 X XX
1|1|1|1| 1|1
3 b
1
0 0 0|01 1111| 1
4 b
0| 0|1|1|0 1 1|1
0 10|1|1011111
0 1
1 0 011 1 10 1 1 1
1 1 0 1 1 11 1 1 0 11
1
111
d G2A
5 b
1
d G2B
6 b
1
11110| 1|1|1
1
G1
7 b
1|1 1 0 1 1
1 1 11
1|1|1|1|0 1
1
1
11110
Figure Q2
Enable
Select Inputs
Outputs
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