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2) For the counter shown in Fig. 15(a), sketch the output waveforms (A, B and C) for the inputs waveforms (CK and M) shown in Fig. 15(b). (Initial condition: Qa=0, QB=0 and Qc=1). Мо J J J CK EFA FFB FFC K K (a) CK 3 M I (b) Fig. 15 5 2.

2) For the counter shown in Fig. 15(a), sketch the output waveforms (A, B and C) for the inputs waveforms (CK and M) shown in Fig. 15(b). (Initial condition: Qa=0, QB=0 and Qc=1). Мо J J J CK EFA FFB FFC K K (a) CK 3 M I (b) Fig. 15 5 2.

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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Discussions: 2) For the counter shown in Fig. 15(a), sketch the output waveforms (A, B and C) for the inputs waveforms (CK and M) shown in Fig. 15(b). (Initial condition: Qa=0, QB=0 and Qc=1). J J J CK CFA FFB FFC K K (a) CK 3 |5 (b) Fig. 15 3 Draw a log c diagram of a divide-by- 4 counter using IC 7493 and 2-input AND gate. App endix: 1. IC's. 'in diagrams INPUT INPUT A NC GND A NC Op GND 14 13 12 " 10 14 13 12 QA в Ro(2) Ro(1) Ro(2) Rg(1) Ro(1) Ro(2) 5 3 INPUT RO(1) Ro(2) NC Vcc Rg(1) Rg(2) INPUT RO(1) Ro(2) NC B NC NC IC 7493 Decade and Binary Counter IC 7490 Decade Counter 2.
Transcribed Image Text:Discussions: 2) For the counter shown in Fig. 15(a), sketch the output waveforms (A, B and C) for the inputs waveforms (CK and M) shown in Fig. 15(b). (Initial condition: Qa=0, QB=0 and Qc=1). J J J CK CFA FFB FFC K K (a) CK 3 |5 (b) Fig. 15 3 Draw a log c diagram of a divide-by- 4 counter using IC 7493 and 2-input AND gate. App endix: 1. IC's. 'in diagrams INPUT INPUT A NC GND A NC Op GND 14 13 12 " 10 14 13 12 QA в Ro(2) Ro(1) Ro(2) Rg(1) Ro(1) Ro(2) 5 3 INPUT RO(1) Ro(2) NC Vcc Rg(1) Rg(2) INPUT RO(1) Ro(2) NC B NC NC IC 7493 Decade and Binary Counter IC 7490 Decade Counter 2.
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