18. The flip-flop circuit in Fig (a) is used to generate a binary count sequence. The gates form a decoder that is supposed to produce a HIGH when a binary zero or a binary three state occurs (00 or 11). When you check the Qa and QB outputs, you get the display shown in part (b), which reveals glitches on the decoder output (X) in addition to the correct pulses. What is causing these glitches, and how can you eliminate them? CLK D D CLK G G2 Glitch Glitch (a) (b)

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18. The flip-flop circuit in Fig (a) is used to generate a binary count sequence. The gates form a decoder that
is supposed to produce a HIGH when a binary zero or a binary three state occurs (00 or 11). When you
check the Qa and QB outputs, you get the display shown in part (b), which reveals glitches on the decoder
output (X) in addition to the correct pulses. What is causing these glitches, and how can you eliminate them?
CLK
CLK
G3
G2
Glitch
Glitch
(а)
(b)
Transcribed Image Text:18. The flip-flop circuit in Fig (a) is used to generate a binary count sequence. The gates form a decoder that is supposed to produce a HIGH when a binary zero or a binary three state occurs (00 or 11). When you check the Qa and QB outputs, you get the display shown in part (b), which reveals glitches on the decoder output (X) in addition to the correct pulses. What is causing these glitches, and how can you eliminate them? CLK CLK G3 G2 Glitch Glitch (а) (b)
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