13. In this problem you are supposed to develop a state diagram for a "101" sequence detector. This sequence detector will examine a string of 0's and 1's applied to the input x and generate an output z=1 only when the input sequence ends in 101. The input x can change only between positive clock active edges. The detector can be designed as either a Mealy FSM or a Moore FSM. If the sequence detector is designed as a Mealy FSM, the output z-1 coincides with the last 1 in "101". If it is designed as a Moore FSM, the output z=1 coincides with the clock edge during the last 1 in "101", typically behind the Mealy output. A typical input sequence and the corresponding output sequence are = 0 1 1 10 1001010100 Mealy z = 0 00001000010100 Moore z = 0 00000100001010 X a) Design a Mealy finite state machine that will detect "101" b) Design a Moore finite state machine that will detect "101"
13. In this problem you are supposed to develop a state diagram for a "101" sequence detector. This sequence detector will examine a string of 0's and 1's applied to the input x and generate an output z=1 only when the input sequence ends in 101. The input x can change only between positive clock active edges. The detector can be designed as either a Mealy FSM or a Moore FSM. If the sequence detector is designed as a Mealy FSM, the output z-1 coincides with the last 1 in "101". If it is designed as a Moore FSM, the output z=1 coincides with the clock edge during the last 1 in "101", typically behind the Mealy output. A typical input sequence and the corresponding output sequence are = 0 1 1 10 1001010100 Mealy z = 0 00001000010100 Moore z = 0 00000100001010 X a) Design a Mealy finite state machine that will detect "101" b) Design a Moore finite state machine that will detect "101"
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In this problem you are supposed to develop a state diagram for a “101” sequence detector. This sequence detector will examine a string of 0’s and 1’s applied to the input x and generate an output z=1 only when the input sequence ends in 101. The input x can change only between positive clock active edges. The detector can be designed as either a Mealy FSM or a Moore FSM. If the sequence detector is designed as a Mealy FSM, the output z=1 coincides with the last 1 in “101”. If it is designed as a Moore FSM, the output z=1 coincides with the clock edge during the last 1 in “101”, typically behind the Mealy output. A typical input sequence and the corresponding output sequence are
Transcribed Image Text:13. In this problem you are supposed to develop a state diagram for a "101" sequence detector. This
sequence detector will examine a string of 0's and l's applied to the input x and generate an output
z-1 only when the input sequence ends in 101. The input x can change only between positive clock
active edges. The detector can be designed as either a Mealy FSM or a Moore FSM. If the sequence
detector is designed as a Mealy FSM, the output z=1 coincides with the last 1 in "101". If it is
designed as a Moore FSM, the output z=1 coincides with the clock edge during the last 1 in "101",
typically behind the Mealy output. A typical input sequence and the corresponding output sequence
are
X
= 0 11101001010100
Mealy z =
Moore z = 0 000 00100001010
000001000010100
a) Design a Mealy finite state machine that will detect "101"
b) Design a Moore finite state machine that will detect "l101"
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