12:57 Homework4 S24_7d8b7544e16a0... Homework #4 - Multi segment displays, Adders, Negative Numbers Name Done Please attempt all problems below. Half of your grade for this assignment will be based on completion of all problems, the other half of the grade will be based on your score on 2 randomly selected problems. 1. Assuming each 8-segment display below has its own A - H signal lines and these signals are stored in the FPGA as 8-bit binary numbers arranged in the order (ABCDEFGH)2 a. Below you will find 3 displays each with a hex value directly above. Assuming the displays are connected in Common Cathode. Shade the LEDs that will be lit for each display. (8C)16 (9C)16 (BC)16 b. Repeat the process described in 1.a on the 7-segment display below. Assuming Common Anode and ignore the colon. (41)16 (01)16 (00)16 2. Compute the following in the base shown and in base 10. (Assume unsigned notation) a. (F4)16+ (E6)16 b. (1011 0101)2 + (0111 111012 0.

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12:57
Homework4 S24_7d8b7544e16a0...
Homework #4 - Multi segment displays, Adders, Negative Numbers
Name
Done
Please attempt all problems below. Half of your grade for this assignment will be based on completion
of all problems, the other half of the grade will be based on your score on 2 randomly selected
problems.
1. Assuming each 8-segment display below has its own A - H signal lines and these signals are stored in
the FPGA as 8-bit binary numbers arranged in the order (ABCDEFGH)2
a. Below you will find 3 displays each with a hex value directly above. Assuming the displays are
connected in Common Cathode. Shade the LEDs that will be lit for each display.
(8C)16
(9C)16
(BC)16
b. Repeat the process described in 1.a on the 7-segment display below. Assuming Common Anode
and ignore the colon.
(41)16
(01)16
(00)16
2. Compute the following in the base shown and in base 10. (Assume unsigned notation)
a. (F4)16+ (E6)16
b. (1011 0101)2 + (0111 111012
0.
Transcribed Image Text:12:57 Homework4 S24_7d8b7544e16a0... Homework #4 - Multi segment displays, Adders, Negative Numbers Name Done Please attempt all problems below. Half of your grade for this assignment will be based on completion of all problems, the other half of the grade will be based on your score on 2 randomly selected problems. 1. Assuming each 8-segment display below has its own A - H signal lines and these signals are stored in the FPGA as 8-bit binary numbers arranged in the order (ABCDEFGH)2 a. Below you will find 3 displays each with a hex value directly above. Assuming the displays are connected in Common Cathode. Shade the LEDs that will be lit for each display. (8C)16 (9C)16 (BC)16 b. Repeat the process described in 1.a on the 7-segment display below. Assuming Common Anode and ignore the colon. (41)16 (01)16 (00)16 2. Compute the following in the base shown and in base 10. (Assume unsigned notation) a. (F4)16+ (E6)16 b. (1011 0101)2 + (0111 111012 0.
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