1010 Chapter 15 Differential Amplifiers and Operational Amplifier Design The amplification factor of the MOSFET is given by 1 2K, (1+aVps) and solving for K, yields Ip 1+Vps 0.01 (556) 0.01 1+(11.5 V) 100 μΑ = 2.49 V2 This value of K, is achievable using either discrete components or integrated circuits. In Fig. 15.52, the required gate voltage Vg is 21p VGG = IDRS + VGs = 3.60 + VTN + Kn 2(0.2 mA) 2.49 mA = 3.60 V+1 V + = 5.00 V V2 If the current in the bias resistors is limited to 10 percent of the drain current, then 15 V 5.00 V R3 + R4 = 20 μΑ = 750 k2 and R3 = -750 k2 = 250 kN 15 V The nearest 1 percent values from Appendix A are R3 = 249 k2 and R4 = 499 k2 with Rs = 18.2 k2. The final design appears in the figure below. Check of Results: A recheck of the math indicates that our calculations are corect. SPICE can now be used to verify our design and the results appear below. Discussion: For the MOS source, we can use a larger set of gate bias resistors, since the output resistance of the current source does not depend on RGG. Computer-Aided Analysis: Now, we can check our hand design using SPICE with VTO = 1 V, KP = 2.49 mA/V², and LAMBDA = 0.01 V-'. In the circuit shown here, zero-value source Vo is added to directly measure the output current I, and to provide a source that can be used to find Rout with a SPICE Transfer Function analysis. The results using the 1 percent resistor values are Rout = 11.3 M2 with Io = 198 µA and Iss = 219 µA, which meet all the design specifications. This could be a good point to do a Monte Carlo analysis to explore the influence of tolerances on the design. Also, more complex SPICE models can be used to double check the design. lo R42 499 kn Vo=0 R3 249 kn Rs 18.2 kn -Vss =-15 V
1010 Chapter 15 Differential Amplifiers and Operational Amplifier Design The amplification factor of the MOSFET is given by 1 2K, (1+aVps) and solving for K, yields Ip 1+Vps 0.01 (556) 0.01 1+(11.5 V) 100 μΑ = 2.49 V2 This value of K, is achievable using either discrete components or integrated circuits. In Fig. 15.52, the required gate voltage Vg is 21p VGG = IDRS + VGs = 3.60 + VTN + Kn 2(0.2 mA) 2.49 mA = 3.60 V+1 V + = 5.00 V V2 If the current in the bias resistors is limited to 10 percent of the drain current, then 15 V 5.00 V R3 + R4 = 20 μΑ = 750 k2 and R3 = -750 k2 = 250 kN 15 V The nearest 1 percent values from Appendix A are R3 = 249 k2 and R4 = 499 k2 with Rs = 18.2 k2. The final design appears in the figure below. Check of Results: A recheck of the math indicates that our calculations are corect. SPICE can now be used to verify our design and the results appear below. Discussion: For the MOS source, we can use a larger set of gate bias resistors, since the output resistance of the current source does not depend on RGG. Computer-Aided Analysis: Now, we can check our hand design using SPICE with VTO = 1 V, KP = 2.49 mA/V², and LAMBDA = 0.01 V-'. In the circuit shown here, zero-value source Vo is added to directly measure the output current I, and to provide a source that can be used to find Rout with a SPICE Transfer Function analysis. The results using the 1 percent resistor values are Rout = 11.3 M2 with Io = 198 µA and Iss = 219 µA, which meet all the design specifications. This could be a good point to do a Monte Carlo analysis to explore the influence of tolerances on the design. Also, more complex SPICE models can be used to double check the design. lo R42 499 kn Vo=0 R3 249 kn Rs 18.2 kn -Vss =-15 V
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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What is the minimum drain voltage for which MOSFET Min the circuit on page 1010 remains saturated?
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