1. Which of the following is a type of error associated with digital-to-analog converters (DACs)? A. nonmonotonic error B. incorrect output codes C. offset error D. nonmonotonic and offset error 2. A 4-bit R/2R digital-to-analog (DAC) converter has a reference of 5 volts. What is the analog output for the input code 0101. A. 0.3125 V B. 3.125 V C. 0.78125 V D. –3.125 V 3. A binary-weighted digital-to-analog converter has an input resistor of 100 k. If the resistor is connected to a 5 V source, the current through the resistor is: A. 50 A B. 5 mA C. 500 µA D. 50 mA 4. What is the resolution of a digital-to-analog converter (DAC)? A. It is the comparison between the actual output of the converter and its expected output. B. It is the deviation between the ideal straight-line output and the actual output of the converter. C. It is the smallest analog output change that can occur as a result of an increment in the digital input. D. It is its ability to resolve between forward and reverse steps when sequenced over its entire range.
1. Which of the following is a type of error associated with digital-to-analog converters (DACs)?
A. nonmonotonic error
B. incorrect output codes
C. offset error
D. nonmonotonic and offset error
2. A 4-bit R/2R digital-to-analog (DAC) converter has a reference of 5 volts. What is the analog output for the input code 0101.
A. 0.3125 V
B. 3.125 V
C. 0.78125 V
D. –3.125 V
3. A binary-weighted digital-to-analog converter has an input resistor of 100 k. If the resistor is connected to a 5 V source, the current through the resistor is:
A. 50 A
B. 5 mA
C. 500 µA
D. 50 mA
4. What is the resolution of a digital-to-analog converter (DAC)?
A. It is the comparison between the actual output of the converter and its expected output.
B. It is the deviation between the ideal straight-line output and the actual output of the converter.
C. It is the smallest analog output change that can occur as a result of an increment in the digital input.
D. It is its ability to resolve between forward and reverse steps when sequenced over its entire range.
5. The practical use of binary-weighted digital-to-analog converters is limited to:
A. R/2R ladder D/A converters
B. 4-bit D/A converters
C. 8-bit D/A converters
D. op-amp comparators
6. The difference between analog voltage represented by two adjacent digital codes, or the analog step size, is the:
A. quantization
B. accuracy
C. resolution
D. monotonicity
7. The primary disadvantage of the flash analog-to digital converter (ADC) is that:
A. it requires the input voltage to be applied to the inputs simultaneously
B. a long conversion time is required
C. a large number of output lines is required to simultaneously decode the input voltage
D. a large number of comparators is required to represent a reasonable sized binary number
8. A binary-weighted digital-to-analog converter has a feedback resistor, Rf, of 12 k . If 50 A of current is through the resistor, the voltage out of the circuit is:
A. 0.6 V
B. –0.6 V
C. 0.1 V
D. –0.1 V
9. What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared to a binary-weighted digital-to-analog DAC converter?
A. It only uses two different resistor values.
B. It has fewer parts for the same number of inputs.
C. Its operation is much easier to analyze.
D. The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot.
10. The resolution of a 0–5 V 6-bit digital-to-analog converter (DAC) is:
A. 63%
B. 64%
C. 1.56%
D. 15.6%
11. In a flash analog-to-digital converter, the output of each comparator is connected to an input of a:
A. decoder
B. priority encoder
C. multiplexer
D. demultiplexer
12. Which is not an analog-to-digital (ADC) conversion error?
A. differential nonlinearity
B. missing code
C. incorrect code
D. offset
13. Sample-and-hold circuits in analog-to digital converters (ADCs) are designed to:
A. sample and hold the output of the binary counter during the conversion process
B. stabilize the comparator's threshold voltage during the conversion process
C. stabilize the input analog signal during the conversion process
D. sample and hold the D/A converter staircase waveform during the conversion process
14. Which of the following is common independent variable for speech signal, EEG and ECG?
A. Time
B. Spatial coordinates
C. Pressure
D. None of the mentioned
15. Which of the following conditions made digital signal processing more advantageous over analog signal processing?
A. Flexibility
B. Accuracy
C. Storage
D. All of the mentioned
16. Which property does y(t)=x(1-t) exhibit?
A. Time scaling
B. Time shifting
C. Reflecting
D. Time shifting and reflecting
17. If x(n)=(0,1,2,3,3,0,0,0) then x(2n) is:
A. (0,2,4,6,6,0,0,0)
B. (0,1,2,3,3,0,0,0)
C. (0,2,3,0,0,0,0,0)
D. None of the mentioned
18. If x(n)=(0,0,1,2,3,4,0,0) then x(n-2) is:
A. (0,0,2,4,6,8,0,0)
B. (0,0,1,2,3,4,0,0)
C. (1,2,3,4,0,0,0,0)
D. (0,0,0,0,1,2,3,4)
19. If x(n)=(0,0,1,1,1,1,1,0) then x(3n+1) is:
A. (0,1,0,0,0,0,0,0)
B. (0,0,1,1,1,1,0,0)
C. (1,1,0,0,0,0,0,0)
D. None of the mentioned
20. If a signal x(t) is processed through a system to obtain the signal (x(t)2), then the system is said to be:
A. Linear
B. Non-linear
C. Exponential
D. None of the mentioned
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