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1. Normally the duration of pulses applied to the set or reset input should only be long enough to put the latch in the proper state. a. True b. False 2. Which of the following is not a typical name for the circuit discussed in this topic. a. latch b. RS flip-flop c. set-reset flip-flop d. multivibrator 3. The ambiguous state in a latch is indicated by which of the following conditions? a. both outputs low b. both outputs high c. either a or b high d. one output low, the other

1. Normally the duration of pulses applied to the set or reset input should only be long enough to put the latch in the proper state. a. True b. False 2. Which of the following is not a typical name for the circuit discussed in this topic. a. latch b. RS flip-flop c. set-reset flip-flop d. multivibrator 3. The ambiguous state in a latch is indicated by which of the following conditions? a. both outputs low b. both outputs high c. either a or b high d. one output low, the other

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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1. Normally the duration of pulses applied to the set or reset input should only be long enough to put the latch in the proper state. a. True b. False 2. Which of the following is not a typical name for the circuit discussed in this topic. a. latch b. RS flip-flop c. set-reset flip-flop d. multivibrator 3. The ambiguous state in a latch is indicated by which of the following conditions? a. both outputs low b. both outputs high c. either a or b high 4. Unless the state of a NAND gate latch is being change, its inputs should both be a. high b. low c. open 5. Both inputs of a NAND latch are low. The state of the latch is a. set b. reset c. ambiguous 8. d. one output low, the other TO 6. Both inputs of a NAND latch are low. The S input goes high. Shortly thereafter, the R input goes high. The state of the latch is a. set b. reset c. ambiguous 7. Both inputs to a NOR latch are high. The R input goes low, then the S input goes low. What is the value of the bit stored in the latch? a. binary 0 b. binary 1 Besides the storage of binary data, latches are also commonly used for
Transcribed Image Text:1. Normally the duration of pulses applied to the set or reset input should only be long enough to put the latch in the proper state. a. True b. False 2. Which of the following is not a typical name for the circuit discussed in this topic. a. latch b. RS flip-flop c. set-reset flip-flop d. multivibrator 3. The ambiguous state in a latch is indicated by which of the following conditions? a. both outputs low b. both outputs high c. either a or b high 4. Unless the state of a NAND gate latch is being change, its inputs should both be a. high b. low c. open 5. Both inputs of a NAND latch are low. The state of the latch is a. set b. reset c. ambiguous 8. d. one output low, the other TO 6. Both inputs of a NAND latch are low. The S input goes high. Shortly thereafter, the R input goes high. The state of the latch is a. set b. reset c. ambiguous 7. Both inputs to a NOR latch are high. The R input goes low, then the S input goes low. What is the value of the bit stored in the latch? a. binary 0 b. binary 1 Besides the storage of binary data, latches are also commonly used for
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