1. For the circuit of Figure 3-1, the time constant of the capacitor input filter is (a) 1 ms 2. In Step 5, the de output voltage is approximately (a) 6 V 3. As the time constant of the input filter is decreased, the dc output voltage (a) decreases 4. As the time constant of the input filter is decreased, the output ripple voltage (a) decreases 5. In a well-designed power supply, the percent ripple should be (a) close to 0% (c) close to 100% (b) 10 ms (c) 100 ms (d) 1 s (b) 12 V (c) 18 V (d) 24 V (b) increases (c) remains the same (b) increases (c) remains the same (b) approximately 50%
1. For the circuit of Figure 3-1, the time constant of the capacitor input filter is (a) 1 ms 2. In Step 5, the de output voltage is approximately (a) 6 V 3. As the time constant of the input filter is decreased, the dc output voltage (a) decreases 4. As the time constant of the input filter is decreased, the output ripple voltage (a) decreases 5. In a well-designed power supply, the percent ripple should be (a) close to 0% (c) close to 100% (b) 10 ms (c) 100 ms (d) 1 s (b) 12 V (c) 18 V (d) 24 V (b) increases (c) remains the same (b) increases (c) remains the same (b) approximately 50%
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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