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1. For the circuit in Figure 9-1, if ß = 150, then Ig is ( a) 10 μΑ (c) 20 µA 2. If ß of the transistor in the circuit in Figure 9-1 increases, then (a) Ig decreases (c) VCE decreases 3. If Rg is made smaller in the circuit in Figure 9-1, then (a) Ig decreases (c) VCE decreases %3D (b) 15 µA ( d ) 25 μΑ (b) Iç increases (d) all of the above (b) Iç increases (d) all of the above T

1. For the circuit in Figure 9-1, if ß = 150, then Ig is ( a) 10 μΑ (c) 20 µA 2. If ß of the transistor in the circuit in Figure 9-1 increases, then (a) Ig decreases (c) VCE decreases 3. If Rg is made smaller in the circuit in Figure 9-1, then (a) Ig decreases (c) VCE decreases %3D (b) 15 µA ( d ) 25 μΑ (b) Iç increases (d) all of the above (b) Iç increases (d) all of the above T

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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This multiple choice questions from electronics lab. Pic one is questions && pic two laws. Ic:current of collecter transistor. Ib:current base Ie:of emitter for transistor. I HOPE to help me,thx advanced.???
1. For the circuit in Figure 9-1, if ß = 150, then Ig is ( a) 10 μΑ (c) 20 µA 2. If ß of the transistor in the circuit in Figure 9-1 increases, then (a) Ig decreases (c) VCE decreases 3. If Rg is made smaller in the circuit in Figure 9-1, then (a) IB decreases (c) VCE decreases 4. The collector saturation current for the circuit in Figure 9-1 is approximately (a) 4 mA 5. At cutoff, the collector-to-emitter voltage for the circuit in Figure %3D (b) 15 µA ( d ) 25 μΑ (b) Iç increases (d) all of the above (b) Iç increases (d) all of the above (b) 6 mA (c) 10 mA (d) 15 mA 9-1 is (а) 5 V (b) 7.5 V (c) 10 V (d) 15 V
Transcribed Image Text:1. For the circuit in Figure 9-1, if ß = 150, then Ig is ( a) 10 μΑ (c) 20 µA 2. If ß of the transistor in the circuit in Figure 9-1 increases, then (a) Ig decreases (c) VCE decreases 3. If Rg is made smaller in the circuit in Figure 9-1, then (a) IB decreases (c) VCE decreases 4. The collector saturation current for the circuit in Figure 9-1 is approximately (a) 4 mA 5. At cutoff, the collector-to-emitter voltage for the circuit in Figure %3D (b) 15 µA ( d ) 25 μΑ (b) Iç increases (d) all of the above (b) Iç increases (d) all of the above (b) 6 mA (c) 10 mA (d) 15 mA 9-1 is (а) 5 V (b) 7.5 V (c) 10 V (d) 15 V
USEFUL FORMULAS Quiescent dc base voltage Vec (1) VB = Vcc – I3RB = VBE Quiescent dc collector (emitter) current I kl Vcc-VBE (2) lc = Vc Quiescent dc base current 2N3904 Vcc - VBE (3) IB RB Quiescent dc collector-to-emitter voltage FIGURE 9--1 Schematic diagram of circuii (4) VCE = Vcc – I¢RC dc load line Vcc (5) Ic(sat) (saturation) Rc (6) VCE(ofm = Vcc (cutoff) In general, make (7) Vcc> VBE
Transcribed Image Text:USEFUL FORMULAS Quiescent dc base voltage Vec (1) VB = Vcc – I3RB = VBE Quiescent dc collector (emitter) current I kl Vcc-VBE (2) lc = Vc Quiescent dc base current 2N3904 Vcc - VBE (3) IB RB Quiescent dc collector-to-emitter voltage FIGURE 9--1 Schematic diagram of circuii (4) VCE = Vcc – I¢RC dc load line Vcc (5) Ic(sat) (saturation) Rc (6) VCE(ofm = Vcc (cutoff) In general, make (7) Vcc> VBE
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