1. Design the state diagram and create the state table for a synchronous to detect the sequence 0101. The circuit has a single input, x, and a single output z. The output is logic-1 whenever the input sequence 0101 is detected, logic-0 otherwise. Note that overlapping sequences are allowed (that is: If the input is 01010101, the output is high on every 1 beginning with the second). Write the equations for the state variables and the output z. 2. Design the state diagram and create the state table for a synchronous modulo-3 counter (that is, one that continually counts in the sequence 0, 1, 2, 0, 1, 2, ...). Write the equations for the state variables. Note: In this case, the state variables can be used as the outputs.
1. Design the state diagram and create the state table for a synchronous to detect the sequence 0101. The circuit has a single input, x, and a single output z. The output is logic-1 whenever the input sequence 0101 is detected, logic-0 otherwise. Note that overlapping sequences are allowed (that is: If the input is 01010101, the output is high on every 1 beginning with the second). Write the equations for the state variables and the output z. 2. Design the state diagram and create the state table for a synchronous modulo-3 counter (that is, one that continually counts in the sequence 0, 1, 2, 0, 1, 2, ...). Write the equations for the state variables. Note: In this case, the state variables can be used as the outputs.
Programming Logic & Design Comprehensive
9th Edition
ISBN:9781337669405
Author:FARRELL
Publisher:FARRELL
Chapter4: Making Decisions
Section: Chapter Questions
Problem 4RQ
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