1. Design a 10-state Johnson counter using minimal number of 74HC194 ICs and external gates. Assume that 74HC194 is cleared to zero initially and the register contents are to be shifted right at each clock pulse.

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1. Design a 10-state Johnson counter using
minimal number of 74HC194 ICs and external
gates. Assume that 74HC194 is cleared to zero
initially and the register contents are to be
shifted right at each clock pulse.
D.
D
D:
D,
(3)
(4)
(5)
(6)
(1)
CLR
74HC194
(9)
Bidirectional
(10)
Shift Register
(2)
SR SER
(7)
SL SER
CLR
S1
so
Function
(11)
CLK
Reset (Async.)
Hold (Do nothing)
Shift right
Shift left
(15) (14) (13) (12)
L
L
SR SER: Shift-right serial input
SL SER: Shift-left serial input
H
L
H
Parallel load
Figure 1. Block diagram of 74x194
IC.
Transcribed Image Text:1. Design a 10-state Johnson counter using minimal number of 74HC194 ICs and external gates. Assume that 74HC194 is cleared to zero initially and the register contents are to be shifted right at each clock pulse. D. D D: D, (3) (4) (5) (6) (1) CLR 74HC194 (9) Bidirectional (10) Shift Register (2) SR SER (7) SL SER CLR S1 so Function (11) CLK Reset (Async.) Hold (Do nothing) Shift right Shift left (15) (14) (13) (12) L L SR SER: Shift-right serial input SL SER: Shift-left serial input H L H Parallel load Figure 1. Block diagram of 74x194 IC.
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