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1. By the comparison among pipeline, superpipeline, and superscalar. The ----- speed up factor. has greatest d) pipeline and superscalar a) superpipeline b) superscalar 2. The Wilkes control technique is a a) vertical b) orthogonal c) pipeline microprogramming format. c) Horizontal d) Variable format 3. The result of implementing booth's algorithm for multiplicand register and multiplier register of a hardware circuit (11101) and (1100). The result is |||0| a) (-12)d b) (812)d c) (12)d d) (-812)d 11100 1100 4. In signed-magnitude binary division, if the dividend is (11100) and divisor is (10011) then the result is a) (10100) b) (00100) c) (11001) d) (01100) 5. The disadvantages of the hardwired approach are a) It is less b) It cannot be used for c) It is costly complex instructions flexible d) less flexible & cannot be used for complex instructions 6. The IEEE 32-bit floating-point number (0 10000010 10001100000000000000000) represent of: d) None of the mentioned a) 4.375 b) 12.375 c) 2.105497145E39 7. The registers are involves in the interrupt cycle are: a) MAR, MBR, (b) MAR, MBR, (c) MAR, MBR, Control unit d) MAR, MBR PC IR 8. The Multi-processor organization of the symmetric multiprocessor (SMP) system are a) SISD b) MIMD c) SIMD d) MISD 9. The sequencing techniques categories of the microinstruction control unit are: a) Two address b) branch taken, c) Check for zeros, branch never d) None of the fields Single Align tha

1. By the comparison among pipeline, superpipeline, and superscalar. The ----- speed up factor. has greatest d) pipeline and superscalar a) superpipeline b) superscalar 2. The Wilkes control technique is a a) vertical b) orthogonal c) pipeline microprogramming format. c) Horizontal d) Variable format 3. The result of implementing booth's algorithm for multiplicand register and multiplier register of a hardware circuit (11101) and (1100). The result is |||0| a) (-12)d b) (812)d c) (12)d d) (-812)d 11100 1100 4. In signed-magnitude binary division, if the dividend is (11100) and divisor is (10011) then the result is a) (10100) b) (00100) c) (11001) d) (01100) 5. The disadvantages of the hardwired approach are a) It is less b) It cannot be used for c) It is costly complex instructions flexible d) less flexible & cannot be used for complex instructions 6. The IEEE 32-bit floating-point number (0 10000010 10001100000000000000000) represent of: d) None of the mentioned a) 4.375 b) 12.375 c) 2.105497145E39 7. The registers are involves in the interrupt cycle are: a) MAR, MBR, (b) MAR, MBR, (c) MAR, MBR, Control unit d) MAR, MBR PC IR 8. The Multi-processor organization of the symmetric multiprocessor (SMP) system are a) SISD b) MIMD c) SIMD d) MISD 9. The sequencing techniques categories of the microinstruction control unit are: a) Two address b) branch taken, c) Check for zeros, branch never d) None of the fields Single Align tha

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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- has greatest 1. By the comparison among pipeline, superpipeline, and superscalar. The speed up factor. a) superpipeline b) superscalar 2. The Wilkes control technique is a a) vertical b) orthogonal c) pipeline microprogramming c) Horizontal d) pipeline and superscalar format. d) Variable format 3. The result of implementing booth's algorithm for multiplicand register and multiplier register of a hardware circuit (11101) and (1100). The result is b) (812)d Illel a) (-12)d c) (12)d d) (-812)d 1100 4. In signed-magnitude binary division, if the dividend is (11100) and divisor is (10011) then the result is a) (10100) b) (00100) c) (11001) d) (01100) 5. The disadvantages of the hardwired approach are a) It is less b) It cannot be used for c) It is costly d) less flexible & cannot be used complex instructions flexible for complex instructions 6. The IEEE 32-bit floating-point number (0 10000010 10001100000000000000000) represent of: a) 4.375 b) 12.375 d) None of the mentioned c) 2.105497145E39 7. The registers are involves in the interrupt cycle are: a) MAR, MBR, (b) MAR, MBR, (c) MAR, MBR, Control unit d) MAR, MBR PC IR 8. The Multi-processor organization of the symmetric multiprocessor (SMP) system are a) SISD b) MIMD c) SIMD d) MISD 9. The sequencing techniques categories of the microinstruction control unit are: b) branch taken, (a) Two address fields, Single address field, Variable format 10. Execute the instruction: branch never taken c) Check for zeros, Align the significands, d) None of the mentioned BSA X: X is memory location, need : b) 3 steps and 5 c) 3 steps and 3 a) 5 steps and 5 μ operations d) 5 steps and 3 μ operations u operations u operations
Transcribed Image Text:- has greatest 1. By the comparison among pipeline, superpipeline, and superscalar. The speed up factor. a) superpipeline b) superscalar 2. The Wilkes control technique is a a) vertical b) orthogonal c) pipeline microprogramming c) Horizontal d) pipeline and superscalar format. d) Variable format 3. The result of implementing booth's algorithm for multiplicand register and multiplier register of a hardware circuit (11101) and (1100). The result is b) (812)d Illel a) (-12)d c) (12)d d) (-812)d 1100 4. In signed-magnitude binary division, if the dividend is (11100) and divisor is (10011) then the result is a) (10100) b) (00100) c) (11001) d) (01100) 5. The disadvantages of the hardwired approach are a) It is less b) It cannot be used for c) It is costly d) less flexible & cannot be used complex instructions flexible for complex instructions 6. The IEEE 32-bit floating-point number (0 10000010 10001100000000000000000) represent of: a) 4.375 b) 12.375 d) None of the mentioned c) 2.105497145E39 7. The registers are involves in the interrupt cycle are: a) MAR, MBR, (b) MAR, MBR, (c) MAR, MBR, Control unit d) MAR, MBR PC IR 8. The Multi-processor organization of the symmetric multiprocessor (SMP) system are a) SISD b) MIMD c) SIMD d) MISD 9. The sequencing techniques categories of the microinstruction control unit are: b) branch taken, (a) Two address fields, Single address field, Variable format 10. Execute the instruction: branch never taken c) Check for zeros, Align the significands, d) None of the mentioned BSA X: X is memory location, need : b) 3 steps and 5 c) 3 steps and 3 a) 5 steps and 5 μ operations d) 5 steps and 3 μ operations u operations u operations
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