1. A byte-addressable computer has a small data cache capable of holding eight 32-bit words. Each cache block consists of one 32-bit word. When a given program is executed, the processor reads data sequentially from the following hex addresses: 494, 4A4, 484, 49C, 4B8, 494, 4C0, 4C0 a. Assume that the cache initially contains. 0 1 2345 6 7 4A04A4 4A8 48C 490 494 4B849C Show the contents of the cache at the end of each pass through the loop if a direct-mapped cache is used and compute the hit rate. b. Repeat part (a) for a two-way set-associative cache, with initial contents. 0 1 2 3 4A01490494 14B44A8r4B8 48C 149C