1) Let us consider a logic system represented by the two Boolean functions: f(x₁, x2, x3, x4) =(4, 5, 10, 11, 12, 13, 14, 15) g(x₁, X2, X3, X4) = (0, 1, 4, 5, 8, 9, 11, 12, 13, 15) 2) complete the following VHDL code using modelsim to describe the two Boolean functions circuit:

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15:40
1) Let us consider a logic system represented by the two Boolean functions:
f(x₁, x2, x3, x4) =(4, 5, 10, 11, 12, 13, 14, 15)
g(x₁, X2, X3, X4) = Σ(0, 1, 4, 5, 8, 9, 11, 12, 13, 15)
2) complete the following VHDL code using modelsim to describe the two Boolean functions
circuit:
F(x):
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity Exp2 is
end Exp2;
architecture Exp2_arch of Exp2 is
begin
end Exp2_arch;
3) Run the simulation and sketch your results below:
F(x):
G(x):
G(x):
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity Exp2 is
end Exp2;
architecture Exp2_arch of Exp2 is
begin
20
end Exp2 arch;
Transcribed Image Text:15:40 1) Let us consider a logic system represented by the two Boolean functions: f(x₁, x2, x3, x4) =(4, 5, 10, 11, 12, 13, 14, 15) g(x₁, X2, X3, X4) = Σ(0, 1, 4, 5, 8, 9, 11, 12, 13, 15) 2) complete the following VHDL code using modelsim to describe the two Boolean functions circuit: F(x): library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; entity Exp2 is end Exp2; architecture Exp2_arch of Exp2 is begin end Exp2_arch; 3) Run the simulation and sketch your results below: F(x): G(x): G(x): library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; entity Exp2 is end Exp2; architecture Exp2_arch of Exp2 is begin 20 end Exp2 arch;
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